Multi-valued quantizer output design and assignment method

Abstract

The invention discloses a multi-valued quantizer output design and assignment method, which is characterized in that a plurality of PNP triodes Q0, Q1, Q2,...,Qn are used as output driving transistors; emitters of the Q0, Q1, Q2,...,Qn driving transistors are connected with output ends F1, F2, F3,..., Fn of a claim 5 in a patent 00105165.2, a claim 3 of 00105162.8 and a claim 4 of 00105164.4; thebases of the Q0, Q1, Q2,...,Qn driving transistors are mutually connected and are connected with the positive electrode of a reference power supply +ref; the collectors of the Q0, Q1, Q2,...,Qn form collector open circuit outputs to sequentially form OC0, OC1, OC2...OCn outputs; output end lines of OC0, OC1, OC2...OCn are arranged according to serial numbers to form a group of output line groups with continuous numbers, the continuous sequential numbers of the line group are used to calibrate the bit weight values, the weight value calibrated by a serial number and the belonging weight value of the line group position are concident, and one line group is a standard bit weight output.

Description

technical field [0001] The present invention relates to the field of computer technology, in particular to the realization of one of the basic hardware of a multi-valued computer "the output design and assignment method of a multi-valued quantizer" technical background [0002] So far all computers and their related digital systems are binary. Although multi-valued computing has many advantages, it develops very slowly because there is no key hardware supporting multi-valued computing. It can be said that multi-valued computers, especially decimal The realization of computer is almost zero, in view of this situation, the present invention proposes a kind of simple and effective multi-value calculation implementation circuit, especially the effective method of ten-value calculation and realizes multi-value, especially ten-value addition and subtraction with binary hardware , Multiplication, division arithmetic operations and key circuits of logic operations are called "quanti...

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Problems solved by technology

[0002] So far all computers and their related digital systems are binary. Although multi-valued computing has many advantages, it develops very slowly because there is no key hardware supporting multi-valued computing. It can be said that multi-valued computers, especially decimal The realization of computer is almost zero, in view of this situation, the present invention proposes a kind of simple and effective multi-value calculation implementation circuit, especially the effective method of ten-value calculation and realizes multi-value, especially ten-value addition and subtraction with binary hardware , multiplication, division arithmetic operations and the key circuits of logic operations, which are called "quantization logic" and their circuits

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