807 results about "Multi valued" patented technology

The Customer Activated Multi-Value (CAM) card provides a customer with a primary use as a transaction card which can be further activated to have a secondary use as a credit card. The CAM card can be activated as a transaction card or as a transaction card with a credit card feature. Activation of the CAM card as a transaction card allows the customer to purchase goods and services from one specific vendor and to establish a relationship with that vendor for the goods or services rendered (for example, telephone calling card or gasoline product purchasing card) while enjoying reward benefits based on those purchases. Activation of the credit feature of the card allows the customer to interact with any merchant that accepts traditional credit cards such as VISA®, MASTERCARD®, AMERICAN EXPRESS®, or DISCOVER®. The combination of features allows a customer to purchase various goods and services from several different merchants. If the customer chooses to activate the CAM card as both a transaction card and a credit card, the customer is given the benefit of using the card in both manners described above.

Non-volatile memory devices and methods of operating the same are disclosed. A non-volatile memory device includes a semiconductor substrate. A tunnel insulating layer and a gate electrode are on the semiconductor substrate. A multiple tunnel insulation layer with a plurality of layers, a charge storage insulation layer, and a multiple blocking insulation layer with a plurality of layers are sequentially stacked between the gate electrode and the tunnel insulating layer. A first diffusion region and a second diffusion region in the semiconductor substrate are adjacent to opposite respective sides of the gate electrode. When a voltage is applied to the gate electrode and the semiconductor substrate to form a voltage level difference therebetween, a minimum field in the tunnel insulation layer is stronger than a minimum field in the blocking insulation layer. A minimum field established at a blocking insulation layer can be stronger than a minimum field established at a tunnel insulation layer, and the migration probability of charges through the tunnel insulation layer can be higher than that of charges through the blocking insulation layer. Therefore, it may be possible to use lower operation voltages, obtain higher program and erase speeds, and / or obtain a greater difference between threshold values of a program threshold voltage and an erase threshold voltage. As a result, a multi-valued non-volatile memory device may be formed therefrom.

The Customer Activated Multi-Value (CAM) card provides a customer with a primary use as a transaction card which can be further activated to have a secondary use as a credit card. The CAM card can be activated as a transaction card or as a transaction card with a credit card feature. Activation of the CAM card as a transaction card allows the customer to purchase goods and services from one specific vendor and to establish a relationship with that vendor for the goods or services rendered (for example, telephone calling card or gasoline product purchasing card) while enjoying reward benefits based on those to purchases. Activation of the credit feature of the card allows the customer to interact with any merchant that accepts traditional credit cards such as VISA®, MASTERCARD®, AMERICAN EXPRESS®, or DISCOVER®. The combination of features allows a customer to purchase various goods and services from several different merchants. If the customer chooses to activate the CAM card as both a transaction card and a credit card, the customer is given the benefit of using the card in both manners described above.

In a display of properties (or metadata) for multiple selected files, properties may be aggregated. Visual differentiation may be used to associate displayed aggregated values with one or more selected files to which the values pertain. Multi-value properties may also be aggregated and differentiated and / or accentuated. When aggregating multiple multi-value properties, steps may be taken to carry relative priority or positioning assigned by each of the selected files to which the multi-value properties pertain. Aggregated multi-value properties may include prompt text informing them of editing options, and users may edit properties by editing the displayed aggregated properties. Changes to the aggregated properties may be applied to the properties of the various selected files.

A method and system for managing and evaluating commodities purchasing over a network of distributed computing devices. In one embodiment, the method allows a plurality of buyers to generate one request for quote and, response to the request for quote, receive a quote from plurality of vendors. The system of the present invention provides a price normalization routine that allows buyers to evaluate and compare a normalized price for commodity products having different evaluation parameters. In an arrangement comprising a plurality of computers connected to a network said plurality of computers including at least one server, at least one buyer client computer and a plurality of seller client computers, the method for providing commodities exchange services first provides a web-based browsable display describing at least one commodities exchange service. The system then receives at least one request for quote from the buyer. The system then receives at least one quote from different sellers, wherein each quote may have a different price and quantity listed. The system then compares to one or more selected metrics and normalizes the prices received from the different quotes, thus, allowing the buyer to readily compare the prices of a number of commodity items having inherently different values. In one embodiment, the system of the present invention also provides a method for multi-value cross compilation of sales transactions, iterative quote information, and metric data for purposes of evaluation and strategy analysis.

A Viterbi decoding system interprets bits in received QAM constellations as many-valued parameters rather than binary valued parameters. It performs the Viterbi algorithm using these many-valued parameters to provide results superior to hard decision decoding. Rather than applying a hard 0-1 function to the QAM data, the system uses a non-stepped linear or curved transfer function to assign values to the bits. In another aspect, a system differentiates between data bits based on their estimated reliability, giving more emphasis to decoding reliable bits than unreliable bits using any of a variety of techniques. By differentiating between god and bad bits and de-emphasizing or ignoring unreliable bits, the system can provide a significant reduction in uncorrectable errors and packet loss.

A method and system for displaying metadata included in one or more media files. A media library stores one or more media files. A graphical user interface displays metadata of the one or more media files in the media library via a display. A media player application parses data contained in metadata fields of a media file to identify one or more properties of the media file. The user interface allows a user to view each identified property within a metadata field of the media files in a hierarchical format.

A test apparatus includes digital modulators provided in increments of multiple channels. A baseband signal generator performs retiming of data input as a modulation signal for the in-phase (quadrature) component, using a timing signal the timing of which can be adjusted, thereby generating a baseband signal. A driver generates a multi-value digital signal having a level that corresponds to the baseband signal output from the baseband signal generator. A multiplier amplitude-modulates a carrier signal with the multi-value digital signal. An adder sums the output signals of the multipliers.

A non-volatile semiconductor memory device includes: a memory cell array in which a plurality of electrically rewritable and non-volatile memory cells are arranged; a sense amplifier circuit configured to write M-value data (where, M is an integer equal to 4 or more) to pair-cells each constituted by simultaneously selected first and second memory cells connected to a pair of bit lines in the memory cell array, the M-value data being defined as a combination of different threshold levels of the first and second memory cells in M threshold levels to be set at each memory cell, and read M-value data stored in each pair-cell by sensing a difference between cell currents of the first and second memory cells; and a controller configured to control data write and read operations for the memory cell array.

Improved query optimizer using implied predicates. The system facilitates allowing a query optimizing component to introduce into a query, extra predicates that facilitate the following: render the same results as the original query; are used as dictated by rules passed to the optimizing component—these rules specify whether the new predicate is an equivalence (that will substitute the old predicate) or an implication (in which the old predicate is preserved); are considered as cost-based alternatives, and discarded if not useful; are tied to index utilization; and can consider both standard and multi-valued indices.

In a display of properties (or metadata) for multiple selected files, properties may be aggregated. Visual differentiation may be used to associate displayed aggregated values with one or more selected files to which the values pertain. Multi-value properties may also be aggregated and differentiated and / or accentuated. When aggregating multiple multi-value properties, steps may be taken to carry relative priority or positioning assigned by each of the selected files to which the multi-value properties pertain. Aggregated multi-value properties may include prompt text informing them of editing options, and users may edit properties by editing the displayed aggregated properties. Changes to the aggregated properties may be applied to the properties of the various selected files.

Circuit structure and resulting circuitry for multiple-valued logic. The circuit structure allows the design and fabrication of any r-valued logic function of n-places where r is an integer greater than 1 and n is an integer greater than 0. This structure is called SUpplementary Symmetrical LOgic Circuit structure (SUS-LOC). In circuits incorporating SUS-LOC, circuit branches are realized that uniquely deliver circuit response and output. For some circuits, and due to the operating characteristics of the switch elements, additional circuit elements, or stages, must be incorporated to prevent "back biasing." SUS-LOC is fully active. Only active elements perform logic synthesis and those components not directly related to logic synthesis, such as resistors and / or other passive loads, are relegated the task of circuit protection. The fabrication of r-valued, multi-valued, or multiple-valued logic circuits, designed using the definitions of the SUS-LOC structure can be accomplished with known techniques, materials, and equipment.

This invention has as its object to provide an image processing apparatus and method which can efficiently compress an image while maintaining high image quality, and a storage medium for implementing the method. To accomplish this, an apparatus has a text area detector (101) for extracting a text area from multi-valued image data, and generating text area coordinate data (109) as position data of the text area, a binarization unit (102) for generating binary image data (108) by binarizing multi-valued image data of the text area, a color computation unit (103) for generating text color data (110) by computing a representative color of the text area, a text paint unit (104) for generating non-text multi-valued image data A by converting multi-valued image data of the text area using multi-valued image data of an area other than text, a reduction unit (105) for generating reduced non-text multi-valued image data by lowering the resolution of the non-text multi-valued image data, a JPEG compression unit (106) for compressing the non-text multi-valued image data by JPEG, and an MMR compression unit for compressing the binary image data of the text area by MMR.

Methods, apparatus and systems for error correction of n-valued symbols in codewords of p n-valued symbols with n>2 and for n=2 and k information symbols have been disclosed. Coders and decoders using a Linear Feedback Shift Registers (LFSR) are applied to generate codewords and detect the presence of errors. An LFSR can be in Fibonacci or Galois configuration. Errors can be corrected by execution of an n-valued expression in a deterministic non-iterative way. Deterministic error correction methods based on known symbols in error are provided. Corrected codewords can be identified by comparison with received codewords in error. N-valued LFSR based pseudo-noise generators and methods to determine if an LFSR is appropriate for generating error correcting codes are also disclosed. Methods and apparatus applying error free assumed windows and error assumed windows are disclosed. Systems using the error correcting methods, including communication systems and data storage systems are also provided.

A database schema for storing application data in a relational database backing store of a directory service. The application data has at least some entries with multiple value attributes. According to the invention, the application data is profiled to determine how it may be optimally stored in the backing store. Preferably, single entries having single value attributes are stored in a merged attribute table, while entries having multiple value attributes are stored in per attribute tables. According to the optimization, a majority of the attributes are single valued and are stored in the merged table, and the per attribute tables thus store a relatively smaller number of exceptions. This database schema enhances processing of conventional directory service queries into the backing store.

The invention relates to a traveling domain knowledge map construction method and system, and belongs to the field of Web mining and intelligent information processing. Travelling domain knowledge map construction tasks include an entity attribute knowledge expansion subtask and an entity attribute value fusion subtask. By adopting a mixed entity attribute knowledge expansion method, an entity attribute knowledge expansion algorithm based on a lexical field, supervised learning, pattern matching and search engine questions and answers is integrated. For the entity attribute knowledge expansion subtask, a multi-value attribute value fusion method based on source credibility, a fixed pattern single-value attribute value fusion method based on content credibility and a non-fixed pattern attribute value fusion method based on learning ranking are adopted. The structured travelling domain entity knowledge base is constructed, traveling domain entity attribute and attribute value knowledge is accurately expressed, the traveling domain knowledge obtaining efficiency is improved, and the wide application prospect is achieved.

The invention discloses an indoor AGV (Automated Guided Vehicles) path planning method based on an improved A* algorithm. The method comprises the following steps: firstly, constructing an environmental map by adopting a grid method, and expanding the grid map according to the size of an AGV; then, optimizing a search strategy of a traditional A* algorithm, introducing a multi-value map model, cost function evaluation and path inflexion smoothing, and adding safety factors as path evaluation indexes; and finally, adding a starting point and a target point of the AGV to the grid map, adopting an improved distance evaluation function, taking the node with the smallest cost function as a node of the next step, gradually planning a running route of the AGV, and finally displaying the running route in an electronic map. Simulated analysis verifies that the AGV path planning based on the improved A* algorithm is higher in search route safety factor, smoother in path and higher in search speed.

Lane changing assistant for motor vehicles, controlling an automatic changing of the vehicle to a neighboring lane in response to a command by the driver as part of a lane keeping system of the motor vehicle and having an operating element that is movable in opposite directions out of a neutral position, wherein a sensor is assigned to the operating element for each adjustment direction and the sensor supplies a multi-valued output signal which corresponds to the operation of the operating element and determines the dynamics of the lane changing procedure.

The Customer Activated Multi-Value (CAM) card provides a customer with a primary use as a transaction card which can be further activated to have a secondary use as a credit card. The CAM card can be activated as a transaction card or as a transaction card with a credit card feature. Activation of the CAM card as a transaction card allows the customer to purchase goods and services from one specific vendor and to establish a relationship with that vendor for the goods or services rendered (for example, telephone calling card or gasoline product purchasing card) while enjoying reward benefits based on those purchases. Activation of the credit feature of the card allows the customer to interact with any merchant that accepts traditional credit cards such as VISA®, MASTERCARD®, AMERICAN EXRESS®, or DISCOVER®. The combination of features allows a customer to purchase various goods and services from several different merchants. If the customer chooses to activate the CAM card as both a transaction card and a credit card, the customer is given the benefit of using the card in both manners described above.

Systems and methods for determining power profiles associated with software programs. The power profiles may be multi-value profiles and they may be used to modify the programs to alter the power usage characteristics and corresponding power profiles of the programs. One embodiment comprises a system including a data processor, a power measurement unit and a memory. The power measurement unit is coupled to the data processor to determine a profile of the power used by the data processor during execution of a software program. The memory stores the power profile. The power measurement unit and memory may be integrated on the same chip as the data processor. The system may determine and store the power profile without interrupting execution of the program. The power profile may include multiple power level values associated with intervals during the execution of the program, over-threshold counts, or other power metrics.

In a digital camera, a CPU divides a multi-valued image into blocks and selects object blocks, which are to be the object of processing. A CCD outputs luminance values of the multi-valued image. A low luminance threshold value setter sets low luminance threshold values on the basis of mean luminance values of blocks adjacent to the object block. A mean luminance value calculator calculates mean luminance values using luminance values from which luminance values that do not reach the low luminance threshold value in a block have been removed. A binarization threshold value setting circuit sets a binarization threshold value of the block based on the mean luminance values. A binarizer then binarizes the multi-valued image in the block on the basis of the binarization threshold values.

An image coding apparatus for efficient coding on image data having discrete pixel values such as a CG image or a limited color image as well as a natural image where pixel value changes are mild. For this purpose, a tile dividing unit divides multi-valued image data into tiles. An occurred level count unit outputs the result of counting of the number of brightness values in the tile to a comparison unit and outputs the existing brightness values to an index table generation unit. The index table generation unit allocates continuous index values to the existing brightness values, and stores the result of allocation into an index memory table. An index conversion unit replaces the input pixel values in the tile with index values, and outputs the index values to a selector. The selector selects one of the brightness values in the tile or the index values based on the result of comparison by the comparison unit, and outputs the selected values to a tile data predictive coding unit so as to perform predictive coding processing.

A method for the correction of average brightness or brightness uniformity variations in OLED displays comprising: a) providing an OLED display having one or more light-emitting elements responsive to a multi-valued input signal for causing the light-emitting elements to emit light at a plurality of brightness levels; b) measuring the brightness of each light-emitting element at two or more, but fewer than all possible, different input signal values; c) employing the measured brightness values to estimate a maximum input signal value at which the light-emitting element will not emit more than a predefined minimum brightness and the rate at which the brightness of the light-emitting element increases above the predefined minimum brightness in response to increases in the value of the input signal; and d) using the estimated maximum input signal value at which the light-emitting element will not emit light more than the predefined minimum brightness and the rate at which the brightness of the light-emitting element increases above the predefined minimum brightness in response to increases in the value of the input signal to modify the input signal to a corrected input signal to correct the light output of the light-emitting elements.

Provided is a multi-value optical transmitter in which a DC bias may be controlled to be stabilized so as to obtain stable optical transmission signal quality in multi-value modulation using a dual-electrode MZ modulator. The multi-value optical transmitter includes: D / A converters for performing D / A conversion on first and second modulation data which are set based on an input data series, so as to generate a first and a second multi-value signal, respectively; a dual-electrode MZ modulator including phase modulators for modulating light from a light source based on the first multi-value signal and the second multi-value signal, so as to combine optical signals from the phase modulators to output the optical multi-value signal; an optical output power monitor for detecting average power of the optical multi-value signal; and a DC bias control unit for controlling a DC bias for the dual-electrode MZ modulator, so as to maximize the average power.

The present invention provides a multi-value DRAM that does not require additional surface area, has a low cost, and has a good yield. A 4-value memory cell is disposed at the intersection of a word line WL and sub-bit lines BLNx0. A potential corresponding to 11, 10, 01, and 00 is written to the dunmmy cell disposed at the intersection of the sub-bitline connected to the dummy word lines DWLN and DWLT and the SSAs 31 and 32. The SSA30 outputs the data in the memory cell and the reference levels 0x and 1x on the sub-bit lines BLTx0 to the main bit lines GBLN0 and GBLT0. The SSA31 balances the potentials of the dummy cell connected to both dummy word lines and outputs the reference levels 11 and 10 to the main bit line GBLN4. Similarly, the SSA32 balances the potentials of both dummy cells, and outputs the reference levels 01 and 00 to the main bit line GBLT4. The MSA 33 discriminates the upper bit UPBIT and the lower bit LWBIT of the data based on the potentials on the 4 main bit lines.

A semiconductor memory device includes a memory cell array with memory cells arranged therein, each memory cell storing data defined by threshold voltage thereof, wherein the memory cell array includes first and second areas; the first area stores multi-value data written with plural write steps; and the second area stores binary data defined by first and second logic states, threshold levels of which are controlled through the plural write steps adapted to the multi-value data write.

The present invention provides a face image processing apparatus capable of preventing the error extraction of the eye when extracted, and improving reliability in the open / close detection through a two-dimensional feature of the eye area. This face image processing apparatus comprises: a camera (2) for inputting a face image of a person to be detected (1); a multi-valued image memory (3) for temporarily storing the light and shade image obtained by the camera (2); binarization means (4) for binarizing the light and shade image outputted from the multi-valued image memory (3); a binary image memory (5) for temporarily storing the binary image obtained by the binarization means (4); feature extraction means (6A) for extracting a naris binary area from the binary image outputted from the binary image memory (5), and for extracting an eye binary area from the binary image outputted from the binary image memory (5) using the naris binary area as reference; and open / close detection means (7A) for detecting the opening / closing states of the eye based on the shape feature of the eye binary area.

A NAND cell unit comprising a plurality of memory cells which are connected in series. An erase operation is effected on all memory cells. Then, a soft-program voltage, which is opposite in polarity to the erase voltage applied in the erase operation, is applied to all memory cells, thereby setting all memory cells out of an over-erased state. Thereafter, a program voltage of 20V is applied to the control gate of any selected one of the memory cells, 0V is applied to the control gates of the two memory cells provided adjacent to the selected memory cell, and 11V is applied to the control gates of the remaining memory cells. Data is thereby programmed into the selected memory cell. The time for which the program voltage is applied to the selected memory cell is adjusted in accordance with the data to be programmed into the selected memory cell. Hence, data "0" can be correctly programmed into the selected memory cell, multi-value data can be read from any selected memory cell at high speed.

This is a nonvolatile semiconductor memory device capable of raising the speed of write operation of Y access circuits in a 1×sense latch circuit+2×SRAM configuration. In a multi-value flash memory, in a mode of writing from the lower voltage side, writing and erratic determination are performed after data are transferred from SRAMs to a sense latch circuit for “10” and “00” distributions; after the data transfer for “01” distribution, writing is done; after the data transfer for “11” distribution word disturb determination is done; and simplified upper limit determination is done in this sequence. In particular by (1) writing from the lower voltage side of the threshold voltage distribution in the multi-value memory and (2) consecutive application of “write processing” and “upper limit determination processing” to each threshold voltage distribution, after the end of write processing for “10” and “00” distribution, since the threshold voltages of all the memory cells are lower than the upper limit determination voltages of the “10” and “00” distributions, no transfer of write data is needed in upper limit determination processing because other threshold voltage distributions are not masked.