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A memory control device and data storage device

A memory and controller technology, applied in electrical digital data processing, data processing input/output process, instruments, etc., can solve problems such as data transmission speed system unit limitation, reduce design cost, improve stability, and improve speed The effect of matching

Active Publication Date: 2021-11-30
镕铭微电子济南有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The present invention proposes a memory control device and a data storage device to solve the problem in the prior art that the data transmission speed of the memory control device accessing the memory is limited by the system unit

Method used

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  • A memory control device and data storage device
  • A memory control device and data storage device
  • A memory control device and data storage device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0046] In the first embodiment of the present invention, a memory control device, such as figure 1 shown, including the following components:

[0047] system unit 100, data link unit 200 and physical control unit 300;

[0048] Wherein, the system unit 100, the data link unit 200 and the physical control unit 300 are sequentially connected;

[0049] The system unit 100 is configured to convert the received user control instruction into a data link layer instruction recognizable by the data link unit 200, and send the data link layer instruction and the received memory storage access operation instruction to the data link Road unit 200; store write data and / or read data;

[0050] The data link unit 200 is configured to schedule and allocate resources of the data link unit 200 based on the received data link layer instructions, and manage the state of the data link unit 200; convert the received memory storage access operation instructions into conforming The timing parameters...

no. 3 example

[0103] In the third embodiment of the present invention, a data storage device, such as image 3 shown, including the following components:

[0104] The memory control device 400 and the memory 500 described in the first embodiment or the second embodiment of the present invention;

[0105] Wherein, the physical control unit 300 in the memory control device 400 is connected to the memory 500 .

no. 4 example

[0106] In the fourth embodiment of the present invention, a data storage device, such as image 3 shown, including the following components:

[0107] The memory control device 400 and the memory 500 described in the first embodiment or the second embodiment of the present invention;

[0108] Wherein, the physical control unit 300 in the memory control device 400 is connected to the memory 500; the memory 500 is a Flash (flash memory) memory.

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Abstract

The present invention proposes a memory control device, including: a system unit, a data link unit, and a physical control unit; wherein, the system unit, the data link unit, and the physical control unit are connected in sequence. The invention also discloses a data storage device. By implementing the above scheme, the hardware-level parallel setting of the system unit and the data link unit in the memory control device is realized; by adding the data link unit, the system unit and the physical control unit are improved. The matching degree of data transmission between them; through the programmable expansion of the data link unit, the cost of the memory control device is reduced; when the system unit is upgraded, the stability of the data link unit and the physical control unit is greatly improved, The disadvantage of needing to modify the data link unit and / or the physical control unit when upgrading the system unit is avoided.

Description

technical field [0001] The invention relates to the technical field of data storage, in particular to a memory control device and a data storage device. Background technique [0002] With the rapid development of computer equipment, fast storage and / or reading of massive data by computer equipment through data storage devices has become an urgent problem to be solved. Such as figure 1 As shown, the existing memory control device includes: a system layer (System Layer) and a physical layer (Physical Layer); wherein, the system layer includes: an application layer (Application Layer) and a transport layer (Transfer Layer), usually running on a CPU ( The software program on the Central Processing Unit (central processing unit); the physical layer includes: ECC (Error Correcting Code, error checking and correction) device, FLASH (flash memory) timing generator and FLASH memory. However, the system layer in the existing memory control device must map the system layer control fu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06
CPCG06F3/061G06F3/0658G06F3/0679
Inventor 邢立巍菲尔诺斯考特桑尼赖
Owner 镕铭微电子济南有限公司
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