Array substrate, display panel and driving method thereof

Abstract

The present application relates to an array substrate, a display panel and a driving method thereof. The array substrate includes N data lines, M groups of gate lines, and a dummy data line group disposed between the N / 2th data line and the N / 2+1th data line; wherein, the dummy data line group at least includes the th A dummy data line and a second dummy data line; the N / 2th data line, the first dummy data line, the second dummy data line, the N / 2+1th data line and the first gate line and the second gate line At least two groups of virtual pixel units are arranged in the cross-defined area, wherein, the two groups of virtual pixel units are respectively defined as a first virtual pixel unit and a second virtual pixel unit, and the first virtual pixel unit includes at least a first virtual sub-pixel, a second virtual pixel unit, and a second virtual pixel unit. Two virtual sub-pixels and a third virtual sub-pixel, and the second virtual pixel unit at least includes a fourth virtual sub-pixel, a fifth virtual sub-pixel and a sixth virtual sub-pixel. The present application can reduce the requirements for the control chip, so that the array substrate of the present application has better universality.

Description

technical field [0001] The present application relates to the field of display technology, in particular to an array substrate, a display panel and a driving method thereof. Background technique [0002] With the development of the liquid crystal display field, the liquid crystal display has been widely recognized by the market due to its low power consumption, ultra-thin and other advantages. However, as the competition among the major panel makers becomes more and more fierce, the major panel makers pay more and more attention to the cost issue. The research on the problem of cost reduction makes the dual gate (dual gate) architecture derived on the basis of the general gate architecture. The data line (data line) of the dual gate architecture will be halved, and the scan line (scan line) will be doubled. However, using the dual gate architecture may encounter the problem that the number of channels of the source drive circuit is not equal to the number of channels actua...

AI Technical Summary

Problems solved by technology

However, using the dual gate architecture may encounter the problem that the number of channels of the source drive circuit is not equal to the number of channels actually used, resulting in the problem that the output of the source drive circuit cannot display the picture correctly.

The current method to solve this problem is to use all the channels of one of the source driver chips, and let some channels of the other source driver chip be in the floating (floating) state, but the limitation of this approach is that it requires control The output of the chip needs to support the cutting of the image asymmetry, so that this method does not have good universality

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