A FPGA program updating method and system

Abstract

The invention discloses an FPGA program updating method. The main control board receives the target programs to be written from each FPGA sent by a debugging terminal. Receiving a remote control command of the debugging terminal, and sending the target program to be written to the FPGA by the main control board; writingthe received object program by a program updating IP core of the FPGA to be written into the flash for program updating, and the program updating IP core is preset in the FPGA. sending the target program by The application to be written to the FPGA of the corresponding slave board through the remote login master control board, and then updating the IP core by the program preset in the FPGA, and writing the target program to be written into the flash of the FPGA, thereby realizing the single-point program updating and greatly simplifying the updating operation. The application also discloses an FPGA program updating system, which also has the above-mentioned beneficial effects.

Description

technical field [0001] The present application relates to the field of electronic technology, in particular to a method and system for updating FPGA programs. Background technique [0002] With the development of information technology, the intelligence level of the train communication network is constantly improving, and more and more FPGAs are used in related products. [0003] The train communication network is mainly used for data transmission in the process of train control, status monitoring, fault diagnosis, on-board information service, etc., and is known as the "brain" and "nerve" of the train. In the process of development and application, due to changes in requirements or the inherent defects of the program in the FPGA, it is often necessary to optimize and update the FPGA program. [0004] However, the optimization update of the FPGA program on the train is often a very troublesome task. This is because maintenance personnel often need to disassemble the releva...

AI Technical Summary

Problems solved by technology

[0006] figure 1 Although the shown prior art can avoid a large amount of dismantling and installation work, whenever the program of an FPGA needs to be updated, it needs to be operated on the control board of the FPGA. Therefore, when the number of control boards is large, its The workload is still large and needs to be further improved

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