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Method and device for bit interleaving and deinterleaving

A technology of bit interleaving and bit interleaving, which is applied in the deinterleaving method and device, and the field of bit interleaving, which can solve the problems of low interleaving efficiency, achieve the effects of small processing delay, improve interleaving efficiency, and solve low interleaving efficiency

Active Publication Date: 2022-03-18
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Embodiments of the present invention provide a method and device for bit interleaving and deinterleaving to at least solve the technical problem of low interleaving efficiency in the related art

Method used

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  • Method and device for bit interleaving and deinterleaving
  • Method and device for bit interleaving and deinterleaving
  • Method and device for bit interleaving and deinterleaving

Examples

Experimental program
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Embodiment 1

[0074] In this embodiment, a bit interleaving method is provided, figure 1 is a flowchart of a bit interleaving method according to an embodiment of the present invention, such as figure 1 As shown, the process includes the following steps:

[0075] Step S102, performing bit interleaving when specified conditions are met, wherein the specified conditions include at least one of the following:

[0076] The working mode of the information bit sequence;

[0077] Application scenarios of information bit sequences;

[0078] link direction of the information bit sequence;

[0079] the length of the information bit sequence;

[0080] The mother code length corresponding to the information bit sequence;

[0081] The code rate corresponding to the information bit sequence;

[0082] Modulation and Coding Scheme (MCS) level of the information bit sequence;

[0083] Aggregation level of control channel element CCE (Control Channel Element, CCE) carrying information bit sequence;

...

Embodiment 2

[0128] In this embodiment, a device for bit interleaving and deinterleaving is also provided, which is used to implement the above embodiments and preferred implementation modes, and what has already been described will not be repeated. As used below, the term "module" may be a combination of software and / or hardware that realizes a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementations in hardware, or a combination of software and hardware are also possible and contemplated.

[0129] image 3 is a structural block diagram of a bit interleaving device according to an embodiment of the present invention, such as image 3 As shown, the device includes:

[0130] The interleaving module 30 is configured to perform bit interleaving when specified conditions are met, wherein the specified conditions include at least one of the following:

[0131] The working mode of the information bit sequence; ...

Embodiment 3

[0157] This embodiment is an optional embodiment according to the present invention, and is used to describe the application in detail in conjunction with specific examples:

[0158] This embodiment is to perform bit interleaving when the specified condition is met, and the specified condition can be one or more. Optionally, according to the working mode of the current information bit sequence, the link direction (uplink or downlink) of transmitting the information bit sequence link, for example, the downlink does not use an interleaver, and the uplink uses an interleaver), the encoding code rate used by the information bit sequence (for example, the code rate is higher than a certain preset value, and the interleaver is not used), the type of user equipment (URLLC , eMBB or mMTC users, etc.), the channel type for information bit sequence transmission (control channel or traffic channel), the application scenario of the information bit sequence, the format of the information bi...

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Abstract

The present invention provides a bit interleaving and deinterleaving method and device, wherein the bit interleaving method is applied at the transmitting end, including: performing bit interleaving when a specified condition is satisfied. The present invention solves the technical problem of low interleaving efficiency in the related art.

Description

technical field [0001] The present invention relates to the communication field, in particular to a method and device for bit interleaving and deinterleaving. Background technique [0002] The interleaver plays a vital role in the communication system. The main function of the interleaver is to change the order of the elements in the input data sequence, so as to maximize the disruption of the association between the elements and disperse possible errors. In high-order modulation, the role of the interleaver is especially important. The traditional rectangular interleaver is a global interleaver. The interleaving depth varies with the sequence length of the input interleaver. The longer the interleaved sequence, the greater the delay. [0003] In the amplitude modulation system, each bit in the modulation symbol has different protection capabilities. Taking 16QAM (Quadrature Amplitude Modulation, Quadrature Amplitude Modulation) as an example, it is assumed that the bits in...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L1/00
CPCH04L1/0071H04L1/00
Inventor 谢赛锦徐俊彭佛才陈梦竹王辉
Owner ZTE CORP
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