Electronic packaging component and circuit layout structure
A technology of electronic packaging and circuit layout, which is applied in the direction of circuits, electrical components, electric solid devices, etc.
Active Publication Date: 2019-03-22
REALTEK SEMICON CORP
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Problems solved by technology
[0004] Although the pads and traces are located on the same layer of the circuit board, the signal transmission loss or signal coupling can be reduced, but because the distance between the multiple pads on the circuit board is getting smaller and smaller, thus Only the pads located in the first or second circle of the outermost circle of the pad array are allowed, and can be directly connected to another component through the wiring of the same layer
Method used
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[0045] Please refer to figure 1 , figure 1 It is a schematic partial top view of an electronic packaging component according to an embodiment of the present invention. The electronic packaging component 1 of this embodiment is formed by a semiconductor chip through ball grid array packaging technology, wherein the semiconductor chip may be an integrated circuit chip, a dynamic random access memory chip or other semiconductor components.
[0046] The bottom of the electronic packaging component 1 has a solder ball disposition area 10 , and there is a disposition point array 100 in the solder ball disposition area 10 . In addition, the electronic package component 1 has a ball grid array (not labeled), and the ball grid array includes a plurality of ground solder balls 110G and a plurality of signal solder balls 110S disposed corresponding to the array of dots 100 . After the electronic packaging component 1 is disposed on the circuit board, the ground solder ball 110G of the ...
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The invention discloses an electronic packaging component and a circuit layout structure. The electronic packaging component has a plurality of grounding solder balls and a plurality of signal solderballs corresponding to a configuration point array. The configuration point array includes a plurality of grounding configuration points for carrying the grounding solder balls, a plurality of signalconfiguration points for carrying the signal solder balls and a plurality of vacancy configuration points. The grounding configuration points, the signal configuration points and the vacancy configuration points of the configuration point array are arranged into m columns in a first direction and n rows in a second direction, and the grounding configuration points and the vacancy configuration points in the outermost first row or column of the configuration point array are arranged alternately.
Description
technical field [0001] The invention relates to an electronic packaging component and a circuit layout structure, in particular to an electronic packaging component and a circuit layout structure using ball grid array packaging technology. Background technique [0002] An integrated circuit package formed by ball grid array packaging technology is provided with an array of solder ball pads on the bottom surface. In addition, the circuit board usually includes a plurality of pads corresponding to the array of solder ball pads and a plurality of wires respectively connected to the pads. When the integrated circuit package component is installed on the circuit board, the integrated circuit package component is pasted and welded on the corresponding pad through the solder ball pad, and passes through multiple traces connecting the pad, and other components arranged on the circuit board Create a signal connection. [0003] Generally speaking, some of the solder ball pads are gr...
Claims
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IPC IPC(8): H01L23/528
CPCH01L23/5286
Inventor 吴亭莹罗钦元罗新慧
Owner REALTEK SEMICON CORP