Rewiring structure for chip

A technology of re-wiring structure and re-wiring layer, applied in the direction of electrical components, electrical solid devices, circuits, etc., can solve the problems of complicated or even invalid metal pad connection, increase the test cost, etc., and achieve low cost, multiple selectivity, and use. handy effect

Active Publication Date: 2019-03-26

WUHAN XINXIN SEMICON MFG CO LTD

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AI-Extracted Technical Summary

Problems solved by technology

[0004] However, if the position of the metal pad remains unchanged, in some specific cases, the connection of the metal pad may become complicated or even ineff...

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Method used

In above-mentioned technical scheme, the second metal pad pad2 and the 3rd metal pad pad3 that are used for being electrically connected with external structure or equipment, because the quantity and distribution of the 3rd metal pad pad3 and the first metal pad3 The pad1 is consistent, so the test probe card that can be applied to the first metal pad1 can still be applied to the third metal pad3 without adjustment; and because of the addition of the second metal pad2 , the combination of the second metal pad pad2 and the third metal pad pad3 can realize more flexible connection mode and layout; the second metal pad pad2 can have one or more, the number of which is the same as that in the pad layer 40 The distribution of can be set according to the actual situation; other conventional structures can also be formed in the chip 10, which is a conventional technical means in the field, and will not be repeated here.

In summary, the rewiring structure of a chip proposed by the present invention is applied to a chip...

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Abstract

The invention relates to the technical field of semiconductors, in particular, to a chip rewiring structure applied to a chip having the upper surface with a metal interconnection layer formed. Firstmetal bonding pads in a group are formed on the upper surface of the metal interconnection layer. The chip rewiring structure comprises a rewiring layer with metal connecting lines formed and a bonding pad layer. The bonding pad layer formed on the upper surface of the rewiring layer includes one group of second metal bonding pads and one group of third metal bonding pads; at least one second metal bonding pad is connected with one first metal bonding pad by the metal connecting line; the number of the third metal bonding pads is identical with that of the first metal bonding pads and each third metal bonding pad is connected with one corresponding first metal bonding pad by the metal connecting line; and the positions and distribution of the third metal bonding pads in the bonding pad layer are identical with those of the first metal bonding pads in the metal interconnection layer. The chip rewiring structure has the following beneficial effects: much selectivity is provided for metalbonding pad connection; no probe card needs to be provided additionally; and the chip rewiring structure is used conveniently with low cost.

Application Domain

Semiconductor/solid-state device detailsSolid-state devices +1

Technology Topic

EngineeringElectrical and Electronics engineering +3

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Examples

Experimental program(1)

Example Embodiment

[0025] The present invention will be further described below in conjunction with the drawings and embodiments.

[0026] In a preferred embodiment, such as figure 1 with figure 2 As shown, a chip rewiring structure is proposed, which is applied to a chip 10 with a metal interconnection layer 20 formed on the upper surface, and a group of first metal pads are formed on the upper surface of the metal interconnection layer 20 pad1; the rewiring structure of the chip can include:

[0027] The rewiring layer 30 is formed with metal wires 31;

[0028] The pad layer 40 is formed on the upper surface of the redistribution layer and includes a group of second metal pads pad2 and a group of third metal pads pad3;

[0029] At least one second metal pad pad2 is connected to one first metal pad pad1 through a metal connection 31;

[0030] The number of the third metal pads pad3 is the same as that of the first metal pads pad1, and each third metal pad pad3 is respectively connected to a corresponding one of the first metal pads pad1 through a metal connection 31;

[0031] The position and distribution of the third metal pad pad3 in the pad layer 40 are the same as those of the first metal pad pad1 in the metal interconnection layer 20.

[0032] It should be noted that the group of first metal pads pad1 includes a plurality of first metal pads pad1;

[0033] The group of second metal pads pad2 includes at least one second metal pad pad2;

[0034] The group of third metal pads pad3 includes a plurality of third metal pads pad3;

[0035] And one first metal pad pad1 is connected to only one second metal pad pad2.

[0036] In the above technical solution, the second metal pad pad2 and the third metal pad pad3 used for electrical connection with external structures or devices, due to the number and distribution of the third metal pads pad3 are the same as those of the first metal pad pad1 The same, so the test probe card that can be applied to the first metal pad pad1 can still be applied to the third metal pad pad3 without adjustment; and because of the addition of the second metal pad pad2, the second The combination of the metal pad pad2 and the third metal pad pad3 can achieve a more flexible connection and layout; the second metal pad pad2 can have one or more, the number of which and the distribution in the pad layer 40 It can be set according to the actual situation; other conventional structures can also be formed in the chip 10, which is a common technical means in this field and will not be repeated here.

[0037] In a preferred embodiment, the number of second metal pads pad2 is the same as the number of first metal pads pad1;

[0038] Each second metal pad pad2 is respectively connected to a corresponding first metal pad pad1 through a metal connection 31.

[0039] In the above technical solution, each first metal pad pad1 can be connected to a second metal pad pad2 and a third metal pad pad3.

[0040] In a preferred embodiment, the redistribution layer 30 may include a first insulating layer;

[0041] The metal connection 31 is arranged in the first insulating layer.

[0042] In the above technical solution, various grooves and/or through holes may exist in the first insulating layer, and the metal wiring 31 is formed by filling the grooves and/or through holes with a metal conductive material.

[0043] In the above embodiments, preferably, the first insulating layer may be formed of insulating materials such as silicon nitride or polyester compounds.

[0044] In a preferred embodiment, the pad layer 40 may include a second insulating layer;

[0045] The second metal pad pad2 and the third metal pad pad3 are formed in the second insulating layer.

[0046] In the above embodiment, preferably, the second insulating layer is formed of an insulating material such as silicon nitride or polyester compound.

[0047] In a preferred embodiment, a substrate may also be formed in the chip 10.

[0048] In the above-mentioned embodiment, preferably, the substrate is formed of silicon, and the size and area of the substrate may be the same as that of the pad layer 40; the chip 10 may also include other conventional structures, but this is a common technical means in the field. I will not repeat them here.

[0049] In a preferred embodiment, the first metal pad pad1, and/or the second metal pad pad2, and/or the third metal pad pad3 may be formed of copper metal or aluminum metal.

[0050] In summary, a chip rewiring structure proposed by the present invention is applied to a chip with a metal interconnection layer formed on the upper surface, and a group of first metal pads are formed on the upper surface of the metal interconnection layer: Including: rewiring layer, formed with metal connections; pad layer, formed on the upper surface of the rewiring layer, including a group of second metal pads and third metal pads; at least one second metal pad passes through The metal wire is correspondingly connected to one first metal pad; the number of third metal pads is the same as that of the first metal pads, and each third metal pad is connected to a corresponding first metal pad through the metal wire; The position and distribution of the third metal pad in the pad layer are the same as that of the first metal pad in the metal interconnection layer; it can provide more selectivity for the connection of the metal pad, and there is no need to provide additional differences. The probe card is easy to use and low in cost.

[0051] Through the description and drawings, typical examples of specific structures of specific implementations are given, and other conversions can be made based on the spirit of the present invention. Although the above-mentioned invention proposes existing preferred embodiments, these contents should not be regarded as limitations.

[0052] For those skilled in the art, after reading the above description, various changes and modifications will undoubtedly be obvious. Therefore, the appended claims should be regarded as covering all changes and modifications of the true intention and scope of the present invention. Any and all equivalent scopes and contents within the scope of the claims should be considered to still fall within the intent and scope of the present invention.

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Description & Claims & Application Information

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Classification and recommendation of technical efficacy words

Multiple choice
Easy to use

Hybrid power and electric system of electric car

InactiveCN102910058AIncreased charging sourcesMultiple choiceGas pressure propulsion mountingPlural diverse prime-mover propulsion mountingElectric generatorElectricity

Owner:粘育珲

Method for preparing BaM ferrite nano-film of two-dimensional net-shaped structure and with c-axis in-plane orientation based on AAO template

PendingCN110241383AMultiple choiceVacuum evaporation coatingSputtering coatingNanometreIn plane

Owner:HANGZHOU DIANZI UNIV

Rewiring structure for chip

AI-Extracted Technical Summary

Problems solved by technology

Method used

Abstract

Image

Examples

Example Embodiment

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Description & Claims & Application Information

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