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Semi-floating gate memory device and manufacturing method thereof

A storage device and manufacturing method technology, applied in semiconductor devices, electric solid state devices, electrical components, etc., can solve problems such as short channel effect, semi-floating gate potential fluctuation, inability to large-scale integration, etc., to improve access speed, Small fluctuation of performance parameters and the effect of prolonging the storage time of charge

Inactive Publication Date: 2019-06-07
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the low channel doping and small channel length of the parasitic MOSFET, the Vt is small and has a strong short-channel effect, resulting in a large leakage current, which seriously affects the charge retention time in the half-floating gate and will lead to Potential fluctuations and large fluctuations between devices cannot be integrated on a large scale

Method used

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  • Semi-floating gate memory device and manufacturing method thereof
  • Semi-floating gate memory device and manufacturing method thereof
  • Semi-floating gate memory device and manufacturing method thereof

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Embodiment Construction

[0040] The specific embodiment of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0041] It should be noted that, in the following specific embodiments, when describing the embodiments of the present invention in detail, in order to clearly show the structure of the present invention for the convenience of description, the structures in the drawings are not drawn according to the general scale, and are drawn Partial magnification, deformation and simplification are included, therefore, it should be avoided to be interpreted as a limitation of the present invention.

[0042] In the following specific embodiments of the present invention, please refer to figure 2 , figure 2 It is a schematic structural diagram of a semi-floating gate storage device according to a preferred embodiment of the present invention. Such as figure 2 As shown, a kind of semi-floating gate storage device of the present invention may i...

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Abstract

The invention discloses a semi-floating gate memory device and a manufacturing method thereof. Only one piece of photolithography mask and one step of ion implantation are added in existing process flow, so that two heavily doped regions of second type doping can be added on the left and right sides of a semi-floating gate window of an existing device structure; and the two heavily doped regions of second type doping can reduce parasitic MOSFET leakage current, semi-floating gate electric leakage and potential fluctuation, can further enhance the charging current of TFET to a semi-floating gate and shorten the write-in time. Through the device, access speed can be accelerated, the time of the semi-floating gate to preserve charge can be prolonged, and performance parameters between devicesare small in fluctuation, so that the device is suitable for large-scale integration.

Description

technical field [0001] The present invention relates to the technical field of semiconductor storage devices, and more particularly, to a semi-floating gate storage device and a manufacturing method thereof. Background technique [0002] Semiconductor memories are widely used in various electronic products. Different application areas place different requirements on the structure, performance and density of semiconductor memories. For example, static random access memory (SRAM) has high random access speed and low integration density, while standard dynamic random access memory (DRAM) has high density and medium random access speed. [0003] Document Science, 341 (6146): 640-643 proposes a half-floating gate storage device using TFET to erase and write charges, and has been applied in actual tape-out. Its structure is as figure 1 (Please refer to this document for the meaning of the structure represented by each mark in the figure). In this semi-floating gate storage dev...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11521H10B41/30
Inventor 师沛
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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