Main processor error detection using checker processors

Abstract

An apparatus (2) comprises a main processor (4) to execute a main stream (30) of program instructions, two or more checker processors (20) to execute respective checker streams (34) of program instructions in parallel with each other, the checker streams corresponding to different portions (32) of the main stream executed by the main processor, and error detection circuitry (28) to detect an errorwhen a mismatch is detected between an outcome of a given portion (32) of the main stream executed on the main processor (4) and an outcome of the corresponding checker stream (34) executed on one ofthe plurality of checker processors (20). This approach enables high performance main processors (4) to be checked for errors with lower circuit area and power consumption overhead than a dual-core lockstep technique.

Description

technical field [0001] This technique relates to the field of data processing, and more specifically, to error detection. Background technique [0002] Hardware faults, including soft (transient) faults and hard (permanent) faults, are increasingly common in data processing systems. As the number of transistors in a system increases and the feature size decreases, the likelihood of failure increases because smaller transistors are more susceptible to transient errors caused by cosmic ray or other particle strikes, and the potential for smaller feature sizes increases. Increased denaturation will significantly increase the occurrence of transient failures. At the same time, workloads executed on data processing systems are increasingly error-tolerant, especially for applications such as the automotive industry, which require stringent safety standards. Therefore, techniques for detecting errors in data processing systems are becoming increasingly important. Contents of th...

AI Technical Summary

Problems solved by technology

As the number of transistors in a system increases and the feature size decreases, the likelihood of failure increases because smaller transistors are more susceptible to transient errors caused by cosmic ray or other particle strikes, and the potential for smaller feature sizes increases. Increased denaturation will significantly increase the occurrence of transient failures

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