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Vertical memory devices

A memory and pattern technology, applied in semiconductor devices, electrical solid state devices, semiconductor/solid state device manufacturing, etc., can solve problems such as uneven height distribution, inconsistent electrical characteristics of memory cells, and unstable channel current

Pending Publication Date: 2019-12-17
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In a method of manufacturing a VNAND flash memory device having a cell-on-peripheral (COP) structure, when a channel hole is formed to expose a base layer formed of polysilicon, the channel hole may have an uneven depth, and therefore, the The current may not be constant
For example, a selective epitaxial growth process can be performed to form an epitaxial layer under each channel; however, the channel holes have non-uniform depths, so the height distribution between the epitaxial layers in the channel holes may not be uniform
Therefore, the electrical characteristics of the memory cell including the channel may not be uniform

Method used

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  • Vertical memory devices
  • Vertical memory devices
  • Vertical memory devices

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Embodiment Construction

[0017] Hereinafter, a vertical memory device and a method of manufacturing the vertical memory device according to exemplary embodiments of the inventive concepts will be more fully described with reference to the accompanying drawings.

[0018] Figure 1 to Figure 21 are plan views and cross-sectional views illustrating a method of manufacturing a vertical memory device according to an exemplary embodiment of the inventive concept. For example, figure 1 , Figure 6 , Figure 9 and Figure 19 is the floor plan, Figure 2 to Figure 5 , Figure 7 , Figure 8 , Figure 10 to Figure 18 , Figure 20 as well as Figure 21 is a sectional view.

[0019] Hereinafter, a direction substantially perpendicular to the upper surface of the substrate may be a first direction, and two directions intersecting each other among horizontal directions substantially parallel to the upper surface of the substrate may be second and third directions, respectively. In an exemplary embodiment ...

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Abstract

A vertical memory device includes: a gate electrode structure including a ground selection line (GSL), a word line and a string selection line (SSL) sequentially stacked on a substrate in a first direction substantially perpendicular to an upper surface of the substrate; and a channel extending through the gate electrode structure in the first direction, wherein the GSL has a doped polysilicon pattern and a first metal pattern including a metal or a metal silicide, and the doped polysilicon pattern and the first metal pattern are stacked in the first direction, and wherein each of the word line and the SSL has a second metal pattern including a metal.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2018-0066115 filed with the Korean Intellectual Property Office (KIPO) on June 8, 2018, the disclosure of which is hereby incorporated by reference in its entirety. technical field [0002] Exemplary embodiments of inventive concepts relate to a vertical memory device. Background technique [0003] Vertical NAND (VNAND) flash memory technology involves, for example, stacking memory cells vertically in a three-dimensional structure. In a method of manufacturing a VNAND flash memory device having a cell-on-peripheral (COP) structure, when a channel hole is formed to expose a base layer formed of polysilicon, the channel hole may have an uneven depth, and therefore, the The current may not be constant. For example, a selective epitaxial growth process may be performed to form an epitaxial layer under each channel; however, the channel holes have non-uniform depths, so the height distribution among th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11529H01L27/11556H01L27/11573H01L27/11582
CPCH10B41/41H10B43/40H10B41/27H10B43/27H10B43/10H10B43/50H10B41/35H10B43/35H01L21/31144H01L21/32139H10B41/40H10B41/10
Inventor 尹善昊白石千千志成郑恩宅
Owner SAMSUNG ELECTRONICS CO LTD