Display substrate and manufacturing method thereof

Abstract

The invention relates to a display substrate and a manufacturing method thereof. The substrate comprises an effective display area and a GOA unit area. The effective display area comprises a display pixel area and a virtual pixel area located at the edge of the display pixel area; the display substrate is characterized in that the GOA unit area comprises at least one virtual GOA unit, and the output end of the GOA unit area is connected with the pixel electrode of at least one virtual pixel, so that the load of the virtual GOA unit is the same as or similar to the loads of other GOA units in the GOA unit area. According to the scheme, the virtual electrodes which do not work in the use process of a displayer are fully utilized, the resistance value of the virtual pixel electrodes and the capacitance value between the virtual pixel electrodes and the common electrodes are approximately the same as the resistance value and the capacitance value of each row of gate lines, and therefore the loads of GOA units are the same, and the signal delay of the virtual GOA units is the same as that of other GOA units.

Description

technical field [0001] The present application relates to the field of display technology, in particular to a display substrate using GOA technology and a manufacturing method thereof. Background technique [0002] GOA technology, that is, a gate drive circuit composed of integrated TFTs on a glass substrate, the realization process is the same as that of a general LCD. Since this technology has the advantages of reducing costs, improving module process output, and facilitating the realization of narrow borders, more and more panels are now using this technology. The key point of the design of this technology is the shift register circuit and the trust of the circuit. Its cascade relationship and sequence diagram, such as Figure 1-3 As shown, the existing display screen view, pixel plane view and cross-sectional schematic view of the pixel area are shown as Figure 4-6 shown. [0003] It can be seen that the Output of the GOA unit in this row is not only the Reset of the...

AI Technical Summary

Problems solved by technology

But for narrow frame products, there is no space to design dummy load, then the output of the virtual GOA unit (that is, the reset delay signal of G(n) is relatively small, and the waveforms Tr and Tf (respectively, the rising edge time and falling edge time of Gate OUTPUT) are compared Small, so the Gate signal Delay corresponding to G(n) is also compared with other lines, and thus affects the charging of pixels in this line

In addition, in-vehicle product customers generally require GOA to support bi-directional scanning, and virtual GOA units need to be set at the start and end of GOA, which require more space for virtual loads.

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