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Method for monitoring the step height of the junction area between the active area and the isolation structure

A technology of isolation structure and step height, which is applied in the manufacture of electrical components, circuits, semiconductors/solid-state devices, etc., can solve problems that are not conducive to timely monitoring and resolution of abnormalities, increase product operation cycles, etc., save time and cost, and improve manufacturing efficiency. Effect

Active Publication Date: 2021-11-05
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Method 2 takes several weeks or even months between the abnormal fluctuation of the wafer and the final electrical testing step, which is not conducive to timely monitoring and resolution of abnormalities, and greatly increases the product operation cycle

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  • Method for monitoring the step height of the junction area between the active area and the isolation structure
  • Method for monitoring the step height of the junction area between the active area and the isolation structure
  • Method for monitoring the step height of the junction area between the active area and the isolation structure

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Embodiment Construction

[0028] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the associated drawings. A preferred embodiment of the invention is shown in the drawings. However, the present invention can be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be thorough and complete.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the invention. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0030] The pu...

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Abstract

The invention relates to a method for monitoring the step height of the junction area between an active area and an isolation structure, comprising: forming an isolation structure on a wafer; using a second photolithography plate for photolithography; and transferring the measurement to the simulated isolation structure and the simulated active area The size of the measurement pattern; according to the difference between the measurement result and the reference value, the height of the step is calculated. The present invention reversely calculates the step height according to the measured measurement figure size. Since the step height can be monitored by online measurement during the manufacturing process, no damage will be caused to the wafer, time cost is saved, and manufacturing efficiency is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for monitoring the step height of the junction area between an active area and an isolation structure. Background technique [0002] In the small line width (≤0.13μm) semiconductor process, shallow trench isolation (STI) is currently the most widely used device isolation process, and there are two indicators for process evaluation: [0003] 1. Groove morphology formed by STI. [0004] 2. The step height (Stepheight) between the active (Active) area and the oxide layer filled area (that is, the STI area) obtained after etching, filling, and grinding. [0005] Among them, index 2 involves a variety of processes and multiple steps, and its process precision is relatively poor, with large fluctuations, which have a negative impact on product leakage and final yield. There are two main traditional methods of monitoring this fluctuation: [0006] 1. After the onli...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/67H01L21/762
CPCH01L21/67253H01L21/76224
Inventor 王德进周耀辉任小兵刘群金炎
Owner CSMC TECH FAB2 CO LTD