Drive circuit and display panel using same

Abstract

The invention provides a drive circuit and a display panel using the drive circuit, the drive circuit is applied to the display panel, the drive circuit comprises a time schedule controller, a level shifter connected with the time schedule controller and a selection circuit, the time schedule controller comprises N output pins, each output pin outputs a clock signal, and N is a positive integer; wherein the level shifter comprises N input ends and one output end, the level shifter comprises N level shifting units, the input ends of the N level shifting units are respectively connected with N output pins of the time schedule controller, and the output ends of the N level shifting units are connected with the output end of the level shifter; the time schedule controller outputs a clock signal to one level shifting unit of the level shifter, and the level shifting unit outputs a scanning signal to the selection circuit from the output end according to the clock signal so as to drive the display panel.

Description

technical field [0001] The patent of the present invention relates to a circuit structure in a display, in particular to a driving circuit and a display panel for its application. Background technique [0002] In recent years, with the progress of science and technology, the flat liquid crystal display has been popularized gradually, and it has advantages such as lightness and thinness. At present, the driving circuit of the flat liquid crystal display is mainly composed of ICs connected outside the panel, but this method cannot reduce the cost of the product, nor can it make the panel thinner. [0003] A liquid crystal display device usually has a gate drive circuit, a source drive circuit and a pixel array. There are multiple switch units and pixel electrodes in the pixel array, each switch unit is turned on and off according to the scan signal provided by the gate drive circuit, and the pixel electrode displays a data image according to the data signal provided by the so...

AI Technical Summary

Problems solved by technology

[0006] Therefore, when driving a 12 clock signal (CK) panel, the 12 clock signal (CK) outputs are just connected to the panel one by one, but for the level shifter chip, the cost will be seriously increased; and the level shifter chip is often It is used to drive 6 clock signals (CK) or 8 clock signals (CK) and 10 clock signals (CK) panels, so many output channels are not used and need to be processed, which wastes the output and input ports of the level shifter chip resource

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