Three-dimensional memory and preparation method thereof

A memory, three-dimensional technology, applied in semiconductor devices, electric solid-state devices, electrical components, etc., can solve problems such as limiting step structure design, achieve the effect of large design width, reduce design difficulty, and increase the number of partitions

Pending Publication Date: 2020-07-10
YANGTZE MEMORY TECH CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0005] In the existing 3D NAND memory, the step area of ​​each block storage area occupies only one block storage area, which limits the architectural design of the step

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  • Three-dimensional memory and preparation method thereof
  • Three-dimensional memory and preparation method thereof
  • Three-dimensional memory and preparation method thereof

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Embodiment Construction

[0061] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0062] For example, when describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, which should not limit the protection scope of the present invention. In addition, the three-dimensional space dimensions of length, width and depth sho...

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Abstract

The invention provides a three-dimensional memory and a preparation method thereof, and belongs to the field of semiconductor memory design and manufacturing. A first block storage region of the three-dimensional memory comprises a first core region and a first step region, the second storage region comprises a second core region and a second step region, the first core region and the second coreregion are adjacently arranged in the first direction and are isolated from each other, the first step region and the second step region are adjacently arranged in the second direction and are isolated from each other, and the first step region is provided with a first step widening part extending into the second core region in the first direction; the second step area is provided with a second step widening part which reversely extends into the first core area in the first direction. Through the novel gate line gap (GLS) design, the step region of the block storage region is provided with thestep widening part extending into the core region of the adjacent block storage region, so that the width of the step region of the single block storage region is increased, the increase of the number of partitions is facilitated, and the design difficulty of a memory architecture can be reduced.

Description

technical field [0001] The invention belongs to the field of semiconductor memory design and manufacture, and in particular relates to a three-dimensional memory and a preparation method thereof. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and to pursue lower production costs per unit storage unit, a three-dimensional memory structure emerged as the times require. The three-dimensional memory structure can make each memory die in the memory device have more numbers. memory unit. [0003] In non-volatile memory, such as NAND memory, one way to increase memory density is by using vertical memory arrays,...

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Application Information

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IPC IPC(8): H01L27/1157H01L27/11582
CPCH10B43/35H10B43/27
Inventor 张中
Owner YANGTZE MEMORY TECH CO LTD
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