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Timing method and system for a processor array

A processor array and processor technology, applied in the direction of electrical digital data processing, instruments, combination of various digital computers, etc., can solve the problems of waste of chip resources, increase additional costs, etc., and achieve the goal of improving energy consumption ratio and timing accuracy Effect

Active Publication Date: 2020-12-04
BEIJING RES INST OF MECHANICAL & ELECTRICAL TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of the above analysis, the embodiment of the present invention aims to provide a timing method and system for a processor array to solve the problem of waste of chip resources and additional cost in existing timing methods

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  • Timing method and system for a processor array
  • Timing method and system for a processor array
  • Timing method and system for a processor array

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Embodiment Construction

[0029] Preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of the application and together with the embodiments of the present invention are used to explain the principle of the present invention and are not intended to limit the scope of the present invention.

[0030] A specific embodiment of the present invention discloses a timing method of a processor array, such as figure 1 shown. The timing method of the processor array includes: step S102, randomly selecting a processor from the processor array as a main processor, and using the system clock of the main processor as a reference clock; step S104, generating an external interrupt signal by the main processor and Sending an external interrupt signal to other processors every predetermined time; and Step S106, other processors receive the external interrupt signal and correct their own time based ...

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Abstract

The invention relates to a time service method and a time service system of a processor array, which belong to the technical field of time service, and solve the problems of chip resource waste and additional cost increase of a time service method in the prior art. The time service method of the processor array comprises the following steps of: randomly selecting one processor from the processor array as a main processor, and taking a system clock of the main processor as a reference clock; generating, by the main processor, an external interrupt signal and sending the external interrupt signal to other processors at predetermined intervals; and receiving the external interrupt signal through the other processors and correcting own time based on the external interrupt signal. Under the condition that hardware cost is not additionally increased, resources can be utilized to the maximum extent, and therefore the requirement for synchronous time service is met.

Description

technical field [0001] The invention relates to the technical field of timing, in particular to a timing method and system for a processor array. Background technique [0002] With the widespread application of embedded products, the development of processors in the embedded field is becoming more and more rapid. Distributed systems have become the preferred architecture for application software systems due to their advantages of easy expansion, high reliability, and flexibility, and it is becoming more and more common to use processor arrays to process transactions. Processor arrays are independent of each other and cannot provide a unified global clock, and each process or module maintains their own local clocks; due to the inconsistency of these local clock timing rates and operating environments, even if all local clocks are in a certain Time is calibrated, and after a period of time, these local clocks also become inconsistent. In order for these local clocks to reach...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/12G06F15/16
CPCG06F1/12G06F15/161
Inventor 张晓丹赵伟周广蕴
Owner BEIJING RES INST OF MECHANICAL & ELECTRICAL TECH
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