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Method for scheduling thread bundle warp, processor and computer storage medium

A technology of processors and thread bundles, applied in processor architecture/configuration, computing, program control design, etc., can solve problems such as waste of computing resources

Pending Publication Date: 2020-12-25
芯瞳半导体技术(山东)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The above phenomenon causes a waste of computing resources

Method used

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  • Method for scheduling thread bundle warp, processor and computer storage medium
  • Method for scheduling thread bundle warp, processor and computer storage medium
  • Method for scheduling thread bundle warp, processor and computer storage medium

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Embodiment Construction

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention.

[0024] As the basic scheduling unit for GPU to implement parallel execution, Warp width has a great impact on the performance and effect of parallel execution. Warp width usually indicates the number of threads contained in a warp. Currently, for GPUs, the warp width value is a fixed value. value, so a fixed-width warp cannot achieve the best performance results when facing the different needs of multiple applications. For example, when the warp width is 8, the best performance can be obtained in application scenario A; when the warp width is extended to 16, the best performance can be obtained in application scenario B. In the current GPU design, the warp width is fixed; if the warp width of a GPU is fixed to 8, the GPU can achieve the best performance in application scenario...

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PUM

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Abstract

The embodiment of the invention relates to a GPU technology, and discloses a method for scheduling a thread bundle warp, a processor and a computer storage medium. The method comprises the following steps: a monitoring step: monitoring the number of threads in an idle state in a first warp of a current execution task; a determining step: determining a second warp from the other warps according tothe number of the threads in the idle state and the number of the threads in the active state in the other warps except the first warp in response to the fact that the threads in the idle state currently in the first warp are monitored; and a scheduling step: scheduling the thread of the second warp to a core corresponding to the thread in the idle state in the first warp so as to execute an instruction needing to be executed by the second warp. By means of the method, idle execution resources can be fully utilized, waste of computing resources is reduced, and the performance of the GPU is improved.

Description

technical field [0001] Embodiments of the present invention relate to graphics processing unit (GPU, Graphics Processing Unit) technology, and in particular, to a method for scheduling a warp, a processor, and a computer storage medium. Background technique [0002] Single-Instruction Multiple-Threading (SIMT, Single-Instruction-Mltiple-Thread) is a parallel execution mode commonly used by some GPUs at present, and a thread group or warp (warp) is a basic scheduling unit in the GPU, and each warp corresponds to The number of threads (Thread) is usually fixed, which makes such a parallel architecture simple and easy to maintain, but when executing some specific applications or in some specific scenarios, not all threads contained in the warp are in the same state. Active state, for example, when a warp in the processor is processing a conditional branch (such as if-else) block, some threads (such as M threads) included in the warp will be executed following the "if" path, So...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50G06F9/48G06T1/20
CPCG06F9/5027G06F9/4881G06T1/20G06F2209/5018
Inventor 黄虎才姚冠宇李洋
Owner 芯瞳半导体技术(山东)有限公司