Floating point exception processing method and device
An exception handling and floating-point technology, applied in the computer field, can solve problems such as slow precision, and achieve the effect of improving computing performance, improving computing efficiency, computing time and circuit area.
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example 1
[0241] Example 1 (operand A and operand B are both normalized numbers)
[0242] LZC A = 0, LZC B =0, no need to go through LZC at this time, if normalization is detected, set LZC directly A = 0, LZC B =0.
[0243] Assume that operand A is 1.25, and operand B is 2.345, assuming that the operands are all single-precision floating-point numbers. The following is an example of the step-by-step evolution of each operand in the operation process in the form of a table.
[0244] Operand A: 0x3FA0000 (ie decimal 1.25)
[0245]
[0246] Operand B: 0x4016147B (ie decimal 2.345)
[0247]
[0248] In the implementation process, not all channels need to be extended to 64-bit, which means that the input operands of some channels can be expanded in bit width.
[0249] Note that in this example, the LZC of the input operands are all 0.
[0250] First Exponent Result = ExpA – LZC A +ExpB–LZC B +Bias sp
[0251] =(17’hFFFF-17’hFFFF)–0+(17’h10000-17’hFFFF)–0+8’7F
[0252] =8'h1...
example 2
[0262] Example 2 (operand A is a normalized number, and operand B is a denormalized number)
[0263] Such as Figure 9 As shown, the calculation obtains the first exponent result Exp and the first mantissa result.
[0264] If the result of the first index is smaller than the minimum exponent, it indicates an underflow. At this time, it is necessary to calculate the difference between the result of the first index and the minimum exponent to determine the actual mantissa shift (Underflow shift counter). The algorithm is as follows:
[0265] Underflow shift counter=MinExp–Exp=MinExp+~Exp+1;
[0266] If(Underflow shift counter>64)
[0267] Underflow shift counter = 64;
[0268] Else Underflow=MinExp+~Exp+1.
[0269] Denormalized example
[0270] Operand A: 0x3F7FFFFF
[0271]
[0272] Operand B: 0x00000001
[0273]
[0274] In decimal, theoretically the exponential result in the operation result = ExpA–LZC A +(ExpB–LZC B )+Bias sp=(-1)-0+(-127-22)+127=-23<0 to judg...
example 3
[0358] Example 3 (operand A and operand B are both normalized numbers)
[0359] Operand A: 0x3E80000 (ie decimal 0.25)
[0360]
[0361] Operand B: 0x3F00000 (ie decimal 0.5)
[0362]
[0363] Exponential subtraction:
[0364] The third exponent result = (ExpA – LZC A )–(ExpB-LZC B )+Bias SP
[0365] =(17’hFFFD–17’hFFFF-0)–(17’FFFE-17’hFFFF-0)+8’h7F
[0366] =8'h7E>8'h0. Therefore, the third index result did not underflow.
[0367] Third mantissa result:
[0368] Mantissa A / Mantissa B=
[0369] 64'h8000000000000000 / 64'h8000000000000000
[0370] =64'h8000000000000000
[0371] mantissa shift bit = 0
[0372] Final mantissa result = 24'h800000
[0373] Second division result:
[0374] sign[31] Exponent[30:23] Imp. Mantissa[22:0] 0 01111110 1 00000000000000000000000
[0375] Second division result = 0x3f000000 (ie decimal 0.5)
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