Memory device

A memory and signal technology, applied in the field of memory devices, can solve the problems of long reading paths of controllers, affecting the performance of memory devices, slow reading speed, etc.

Pending Publication Date: 2021-01-22
EOREX
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] When the controller reads each memory module for use, taking a memory device with a length of 133.35mm and eight memory modules as an example, the controller will sequentially read from the first memory module to the eighth memory module. module, so the reading path of the controller needs to be 260mm, which makes the reading path of the controller longer and the reading speed is slower, which affects the performance of the memory device

Method used

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Embodiment Construction

[0027] see figure 1 Shown is a schematic diagram of the first embodiment of the present invention. As shown in the figure, the present invention is a memory device, which includes at least one carrier board 1 , a controller 2 , at least one splitter 3 , several memory modules 4 and at least two resistors 5 .

[0028] The carrier board 1 can be a circuit board.

[0029] The controller 2 is connected to the carrier board 1, and the controller 2 can be a central processing unit, and can be used for reading and controlling command signals, address signals or timing signals.

[0030] The splitter 3 is arranged on the carrier board 1 and connected to the controller 2, the splitter 3 has an input end 31 connected to the controller 2, a first output end 32 and a second output end 33, The command signal, address signal or timing signal of the controller 2 can be received by the input terminal 31, and the command signal, address signal or timing signal can be sent out by the first out...

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PUM

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Abstract

A memory device comprises at least one carrier plate, a controller, at least one demultiplexer, a plurality of memory modules and at least two resistors. The controller is connected with the carrier plate; the demultiplexer, the memory modules and the resistors are respectively arranged on the carrier plate; the demultiplexer is provided with an input end, a first output end and a second output end, wherein the input end, the first output end and the second output end are connected with the controller; and the memory modules can be respectively and partially connected in series and then connected to the first output end and the second output end. Each resistor is connected with a memory module connected to the first output end and the second output end. Therefore, the command signal, the address signal or the time sequence signal of the controller can be simultaneously and respectively sent to each memory module by the first output end and the second output end of the demultiplexer soas to provide program instructions or data reading for the controller, so that the reading path of the controller can be shortened, and the effects of quickly reading and improving the use efficiencyare achieved.

Description

technical field [0001] The present invention relates to a memory device, in particular to a memory device that can shorten the reading path of a controller to achieve fast reading and improve usage performance. Background technique [0002] A common memory device (such as DDR4) includes a controller, a plurality of memory modules connected to the controller, and a resistor connected to one of the memory modules. [0003] When the controller reads each memory module for use, taking a memory device with a length of 133.35mm and eight memory modules as an example, the controller will sequentially read from the first memory module to the eighth memory module. module, so the read path of the controller needs to be 260mm, which makes the read path of the controller longer and the read speed slower, which affects the performance of the memory device. [0004] In order to solve the above-mentioned shortcomings, the inventor of this case has devoted himself to research and developed...

Claims

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Application Information

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IPC IPC(8): G11C7/18G11C8/14
CPCG11C7/18G11C8/14
Inventor 林正隆梁万栋
Owner EOREX
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