Port Equivalent Parallel Analysis Method and System for System Level Integrated Circuit DC Voltage Drop

An integrated circuit and DC voltage drop technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve problems such as huge memory and CPU time

Active Publication Date: 2021-04-06
北京智芯仿真科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For system-level VLSI with multi-scale structure, if high-quality meshing is directly performed on the area where the entire system-level VLSI is located, the number of grid nodes generated will reach tens of millions or even hundreds of millions. It is almost impossible to directly solve the tens of millions or even hundreds of millions of finite element sparse matrices formed by the grid. Even if it can be solved, it will require huge memory and CPU time. For the design of system-level VLSI For this reason, the calculation cost and time cost are too high, so it is necessary to find a faster solution without loss of accuracy, and quickly and accurately analyze the DC voltage drop of the system-level VLSI

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  • Port Equivalent Parallel Analysis Method and System for System Level Integrated Circuit DC Voltage Drop
  • Port Equivalent Parallel Analysis Method and System for System Level Integrated Circuit DC Voltage Drop
  • Port Equivalent Parallel Analysis Method and System for System Level Integrated Circuit DC Voltage Drop

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Embodiment Construction

[0064] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0065] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0066] like figure 1 As shown, the port equivalent parallel analysis method of the DC voltage drop of the system-level integrated circuit:

[0067] Step 101: Divide all PCB boards and packaged integrated circuit ...

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Abstract

The invention discloses a port equivalent parallel analysis method and system for DC voltage drop of system-level integrated circuits. The system-level ultra-large-scale integrated circuit is split into multiple subsystems in units of layers, and the multiple subsystems are parallelized by using coarse particles. Analysis, each coarse particle independently generates the sparse matrix equations of each subsystem and uses the star-delta transformation method to eliminate its internal nodes to form the multi-port network impedance matrix of each subsystem, and uses coarse particles to merge in parallel to form a super large-scale integration The overall multi-port network impedance matrix of the circuit; when analyzing a subsystem in detail, replace the multi-port network impedance matrix of the subsystem with its finite element sparse matrix to form a system of equations for solving the potential field of the subsystem, and then analyze the current subsystem DC voltage drop and current density distribution. On the basis of ensuring the solution accuracy, the invention improves the solution speed and realizes fast and accurate analysis of the DC voltage drop of the system-level VLSI.

Description

technical field [0001] The invention relates to the field of system-level integrated circuits, in particular to a port equivalent parallel analysis method and system for DC voltage drop of system-level integrated circuits. Background technique [0002] The DC voltage drop analysis of system-level VLSI is an important task in the back-end verification of integrated circuits. In the design process of the current system-level VLSI, the core power supply voltage of the devices in the integrated circuit continues to decrease, and the tolerance of the allowable voltage is getting smaller and smaller, but the operating current and wiring density of the integrated circuit are getting larger and larger. As a result, the DC voltage drop problem has become increasingly prominent. If the DC voltage drop problem is not considered in the design process of the system-level VLSI, it is likely that the noise margin of the system will decrease due to the DC voltage drop problem, and a small ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/398
CPCG06F30/398
Inventor 唐章宏邹军汲亚飞王芬黄承清
Owner 北京智芯仿真科技有限公司
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