System-level cache
A system-level, caching technology that can be used in memory systems, climate sustainability, instrumentation, etc. to solve problems such as the inability of client devices to allocate cache lines to reduce latency, improve power efficiency, and improve power consumption
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Example Embodiment
[0123]Example 1 is a system, including:
[0124]Multiple integrated client devices;
[0125]Memory controller, the memory controller is configured to read data from the memory device;
[0126]System-level cache configured to cache data requests through the memory controller for each integrated client device in the plurality of integrated client devices,
[0127]The system-level cache includes a cache memory having a plurality of roads, and each of the plurality of roads is the main road or auxiliary path.
[0128]Each of these main routers are dedicated to a single corresponding partition corresponding to a memory buffer accessed by one or more client devices, and
[0129]Each of them corresponds to a plurality of partitions that correspond to multiple memory buffers accessible to the group of client devices, and
[0130]The system-level cache is configured to maintain mapping between the partition and the priority level, and configured to assign the main path to the corresponding enabled in order corre...
Example Embodiment
[0131]Embodiment 2 is a system of the first embodiment, wherein the system-level cache is configured to discharge the main path to a first partition accessed by one or more first client devices, and is configured to assign secondary way to The first partition and one or more other partitions allocated by a group that also include a client device of the first client device.
Example Embodiment
[0132]Embodiment 3 is a system of the second embodiment, wherein the system-level cache is configured to maintain a mapping between the group and the secondary priority level of the client device, and is configured to follow the group assigned to the client device. The corresponding secondary priority level corresponds to the auxiliary path to the corresponding enable partition.
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