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A pam4 transmitter driving circuit for high-speed optical interconnection

A driving circuit and optical interconnection technology, which is applied in the direction of electromagnetic transmitters, electrical components, electromagnetic wave transmission systems, etc., can solve the problems of gate circuits limiting high-speed performance, patents that have not been released, and large chip areas, etc., and achieve good application prospects. The effect of saving circuit bandwidth and good signal transmission quality

Active Publication Date: 2021-10-26
TIANJIN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, Lin Fujiang and others designed a current mode logic (CML) PAM4 transmitter, which realized the large swing output of the PAM4 signal, but its transmission rate was only 5Gb / s, and due to the introduction of a large tail current, the consumption very high power consumption [1] ; Xiao Lihu and others designed an ultra-long-distance transmission module based on PAM4 technology [2] , but the generation of its PAM4 signal depends on the already formed encoder and is not integrated into the circuit
In addition, Soenen W and others implemented a 50Gb / s PAM4 optical transmitter drive circuit with CML technology, but the gate circuit in the pre-emphasis design limits the high-speed performance [3] ; Rito P and others also implemented a 100Gb / s PAM4 optical transmitter drive circuit based on CML technology, but the inductor introduced to improve the circuit bandwidth occupies a large chip area [4]
[0006] At present, domestic patents related to PAM4 high-speed optical transmitters have not been released

Method used

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  • A pam4 transmitter driving circuit for high-speed optical interconnection
  • A pam4 transmitter driving circuit for high-speed optical interconnection
  • A pam4 transmitter driving circuit for high-speed optical interconnection

Examples

Experimental program
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Embodiment 1

[0041] The embodiment of the present invention proposes a PAM4 transmitter drive circuit for high-speed optical interconnection, see figure 1 , the circuit consists of:

[0042]Four input buffer stages to provide the input impedance matching of the circuit;

[0043] Four D flip-flops, sampling and retiming the input signal to eliminate the possible phase difference;

[0044] Two 2:1 multiplexers to convert four 25Gb / s NRZ signals into two 50Gb / s NRZ signals;

[0045] Two broadband amplifiers to shape the output signal of the multiplexer and increase the bandwidth;

[0046] A CML adder superimposes two NRZ signals into one PAM4 signal, doubling the single-channel data transmission rate.

[0047] A broadband output buffer stage provides circuit output impedance matching and at the same time integrates two bandwidth expansion methods to increase the bandwidth of the entire transmission path.

Embodiment 2

[0049] figure 1 It is the structure diagram of PAM4 transmitter drive circuit. The four 25Gb / s NRZ signals are buffered by the input buffer stage, and the signals are sampled and retimed by the D flip-flop. The retimed signals are respectively multiplexed by two 2:1 multiplexers to obtain two 50Gb / s The NRZ signal, the two signals are amplified and shaped by the broadband amplifier, and then the signals are superimposed by the current mode logic (CML) adder to obtain a PAM4 signal, and the PAM4 signal is buffered by the broadband output buffer stage and output.

[0050] Described in detail below figure 1 The specific realization form of key circuit modules in the structure diagram.

[0051] figure 2 Circuit diagram for the input buffer stage. The overall differential structure is used to suppress the influence of noise on the output; the input signal is connected to the differential pair Q a , Q b The base and collector of the output node V respectively O- , V O+ . A...

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Abstract

The invention discloses a PAM4 transmitter drive circuit for high-speed optical interconnection, the circuit includes: four input buffer stages for providing input impedance matching; four D flip-flops for sampling and retiming input signals, Eliminate phase difference; two 2:1 multiplexers, convert four 25Gb / s NRZ signals into two 50Gb / s NRZ signals; two broadband amplifiers, shape the output signal of the multiplexer and increase the bandwidth; one A current mode logic (CML) adder superimposes two NRZ signals into one PAM4 signal to double the data transmission rate of a single channel; a broadband output buffer stage is used to provide output impedance matching and integrates two bandwidth expansion methods to improve Transmission channel bandwidth. The invention does not need to use a passive inductor, has a small chip area, and is expected to be applied to the next-generation 100G / 200G / 400G Ethernet.

Description

technical field [0001] The invention relates to the field of optical interconnection and high-speed optical transceiver communication system, in particular to a PAM4 (four-level pulse amplitude modulation) transmitter drive circuit for high-speed optical interconnection. Background technique [0002] In recent years, new technologies such as the Internet of Things, cloud computing, and smart sensing have flourished, resulting in explosive growth in data traffic. In order to support such a huge data flow, it is necessary to build a large number of data centers to speed up information exchange and transmission. However, the number of data centers cannot grow infinitely. The fundamental solution to the problem of traffic explosion is to increase the amount of data transmission, exchange, and processing per unit time. Therefore, this puts forward higher requirements on the transmission and switching speed in the backbone network and in the data center. Limited by the "electron...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B10/50H04B10/524H04B10/54H04B10/516
CPCH04B10/50H04B10/5161H04B10/524H04B10/541
Inventor 谢生薛竹君毛陆虹石岱泉
Owner TIANJIN UNIV
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