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Lamination and Design Method of Embedded Synthetic Network Substrate Based on Multiple Laminations

A technology of multiple lamination and design methods, applied in the direction of multilayer circuit manufacturing, printed circuits, electrical components, etc., can solve problems such as difficulty in meeting high-density integration application requirements, and achieve flexible and convenient applications, less design constraints, and high radio frequency Effect of Quarantine Requirements

Active Publication Date: 2022-07-22
SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the beamforming network of broadband board-level integration is limited by the stacking of the substrate. The large-sized beamforming network is realized through radio frequency package integration or a small amount of internal embedding, which is difficult to meet the current application requirements of high-density integration. Continue to design A radio frequency substrate stackup suitable for array synthesis network

Method used

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  • Lamination and Design Method of Embedded Synthetic Network Substrate Based on Multiple Laminations
  • Lamination and Design Method of Embedded Synthetic Network Substrate Based on Multiple Laminations
  • Lamination and Design Method of Embedded Synthetic Network Substrate Based on Multiple Laminations

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Embodiment 1

[0035] This embodiment provides a method for designing a stack of embedded synthetic network substrates based on multiple laminations. , the radio frequency layer is located in the middle of the two ground attribute layers;

[0036] A single base unit is stacked as an array composite network integrated substrate or multiple base units are laminated for multiple times, and at the same time, a radio frequency isolation hole that conducts the entire base unit is individually designed in the base unit.

[0037] Specifically, in this embodiment, as figure 1 As shown in the figure, a single basic unit is used as an array composite network substrate stack, and the radio frequency layer in the basic unit is set in the middle of the two ground attribute layers by means of embedded resistive film processing, so as to realize the board-level embedding of the corresponding coupling and composite network, The size of the array synthesis network is greatly reduced, and the embedded RF synt...

Embodiment 2

[0042] This embodiment is basically the same as Embodiment 1, the difference is that, in this embodiment, the array-synthesized network integrated substrate stack is composed of two basic units, while the array-synthesized network integrated substrate stack is composed of multiple basic units When the unit is formed, there are ground holes or installation holes that communicate with each other between the multiple basic units.

[0043] like figure 2 As shown, two basic unit structures are pressed together to form an array composite network integrated substrate stack, wherein L2 and L5 are two radio frequency layers, and their upper and lower layers (L1, L3, L4, L6) are ground At the attribute layer, each layer has an independent RF isolation hole (hole 2) for signal isolation and electromagnetic shielding around the grounding and RF transmission lines. Hole 1 is the connection between the L2 and L5 RF layers and their respective surface layers L1 and L6. Signal transmission ...

Embodiment 3

[0048] This embodiment is basically the same as Embodiment 1 and Embodiment 2. The difference lies in that, in this embodiment, the array synthesis network integrated substrate stack is composed of three basic units, such as image 3 As shown in the figure, the laminated structure formed by the secondary pressing of the three basic unit structures, wherein L2, L5, L8 are three radio frequency layers, each of which has two upper and lower layers (L1, L3, L4, L6, L7, L9) They are all ground layers, and each layer has an independent RF shielding hole (hole 2) for signal isolation and electromagnetic shielding around the grounding and RF transmission lines. Hole 1 is for the L2, L8 RF transmission layers and their respective surface layers L1, The signal transmission hole between L9, hole 3 can be used as a ground hole, a mounting hole, etc. Any layer interconnection and low frequency layer addition of RF signals can be designed by modifying the length of hole 3 and adding layers ...

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Abstract

The invention relates to the field of radio frequency circuits, and discloses a multi-lamination-based embedded synthetic network substrate stack and a design method. The array synthesis network integrated substrate stack provided by the present invention includes a plurality of basic units pressed together, and the basic unit includes two layers of ground property layers and one layer of radio frequency layer, and the radio frequency layer adopts the method of buried resistance film processing It is arranged in the middle of two ground attribute layers, and at least two ground attribute layers and one digital / power control layer are set between adjacent radio frequency layers. A radio frequency signal transmission hole is opened for transmitting radio frequency signal, and a ground hole or a mounting hole that communicates with each other is provided between a plurality of basic units pressed together. The array synthesis network integrated substrate provided by the invention has various stacking combinations, flexible design, flexible and convenient application, and excellent radio frequency signal isolation performance, which can meet very high radio frequency isolation requirements.

Description

technical field [0001] The invention relates to the field of radio frequency circuits, in particular to the technical field of broadband phased array front-end and composite network design, in particular to an embedded composite network substrate stacking and design method based on multiple laminations. Background technique [0002] With the rapid development of radar, communication and other systems, phased array systems are more and more used in various radar and communication systems, and in the phased array system, the array synthesis network is its main part, and its performance and size It has a very large impact on the performance and size of the array system. As the demand for low profile of array systems becomes more and more urgent, how to design an array synthesis network with excellent performance and small size (especially the size in the cross-section direction) becomes more and more important. [0003] The realization methods of the array synthesis network of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/46
CPCH05K3/4623H05K2203/061H05K2203/068
Inventor 笪余生周俊杜顺勇高阳马磊强杨非宋阳罗洋
Owner SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP
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