A device and method for parallelizing analog in-memory computing based on frequency division multiplexing
A frequency-division multiplexing, one-way technology, applied in frequency-division multiplexing systems, frequency-division multiplexing system components, complex mathematical operations, etc., can solve high system power consumption, high uniformity and other parameters. requirements, too large chip area, etc., to achieve the effect of improving utilization efficiency, improving energy efficiency ratio and computing density, and simplifying difficulty
Active Publication Date: 2022-06-21
NANJING UNIV
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Solve the problem that the existing parallelization scheme requires multiple sets of the same memory array; solve the excessive chip area and high system power consumption caused by the existing parallelization scheme, and the duplication of the hardware process of the existing parallelization scheme on the yield and uniformity Questions with high requirements such as parameters
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[0026] The technical solutions of the present invention will be further described below with reference to the accompanying drawings.
[0027] Depend on Figure 1-Figure 3 It can be seen that the device for parallelized analog memory computing based on frequency division multiplexing according to the present invention includes an input circuit, a storage array and an output circuit; the input of the storage array is connected to the output of the input circuit, and the output of the storage array is connected to the output of the storage array. The input connection of the circuit; the input circuit modulates the k data in each row of the m×k input signal data into a frequency division multiplexed signal output by using k different frequency sources; the memory array includes at least m×n memories The stored weights form an m×n matrix, and m×1 input frequency division multiplexed signals are processed in parallel in the memory array; the output circuit decomposes each frequency ...
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The invention discloses a device for analog memory calculation based on frequency division multiplexing parallelization, which includes an input circuit, a memory array and an output circuit; the input of the memory array is connected to the output of the input circuit, and the output of the memory array is connected to the input of the output circuit ; The input circuit modulates k data of each line of m×k input signal data into one frequency division multiplexing signal output by using k different frequency sources; the memory array includes m×n memory elements, and the storage weights constitute m×n In the matrix, m×1 input frequency division multiplexing signals are processed in parallel in the memory array; the output circuit demodulates and separates each frequency division multiplexing signal output from the memory array into k data. The invention also discloses a method for parallelizing simulation memory calculation based on frequency division multiplexing. The invention realizes parallel memory calculation in the same memory array, realizes matrix-matrix multiplication in one calculation cycle, and improves hardware utilization efficiency, system energy efficiency ratio and calculation density.
Description
technical field [0001] The present invention relates to a device and method for in-memory computing, in particular to a device and method for parallelizing analog in-memory computing based on frequency division multiplexing. Background technique [0002] When the von Neumann architecture is faced with computing tasks that require high performance such as artificial intelligence algorithms, its separate storage and computing architecture results in a lot of energy waste and reduced computing efficiency. The memory array can be used to perform in-memory computing, and the difference from the previous Von Neumann computing architecture is that it adopts analog signals to complete the computing process in the memory array. This new computing architecture has great advantages in power consumption and speed, and is a new computing architecture that is mainly developed in the post-Von Neumann era. According to the existing data, the above-mentioned existing in-memory computing mea...
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IPC IPC(8): H04J1/02H04J1/08G11C16/10G11C16/26G06F17/16
CPCH04J1/02H04J1/08H04J1/085G11C16/10G11C16/26G06F17/16Y02D10/00
Inventor 缪峰梁世军王聪
Owner NANJING UNIV