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Cavity detection method for 3D NAND memory

A void detection and memory technology, applied in semiconductor/solid-state device testing/measurement, electrical solid-state devices, semiconductor devices, etc., can solve the problems affecting the yield rate of 3D NAND memory products, production efficiency, leakage, etc., to improve production efficiency and product quality The effect of yield

Active Publication Date: 2021-09-17
YANGTZE MEMORY TECH CO LTD
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  • Description
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  • Application Information

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Problems solved by technology

[0004] Among them, in the process of forming the selective epitaxial growth layer, a void may be formed in the selective epitaxial growth layer, and the void will make the bottom selective gate (BSG) communicate with the substrate, causing abnormalities such as leakage, and then Affects the product yield and production efficiency of 3D NAND memory

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  • Cavity detection method for 3D NAND memory
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Embodiment Construction

[0014] The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0015] In the description of the present application, the terms "first", "second", etc. are used to distinguish different objects, not to describe a specific order or indicate the number of indicated technical features. In addition, the terms "upper", "inner ", "Outside", "Top", "Bottom", "Thickness" and other indicated orientations or positional relationships are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describi...

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Abstract

The invention provides a cavity detection method for a 3D NAND memory. The method comprises the following steps: removing a part of a selective epitaxial growth layer through etching to obtain a target selective epitaxial growth layer, and enabling the top of the target selective epitaxial growth layer to be lower than or flush with the top of an insulating layer; forming a first protection layer covering the surface of the target selective epitaxial growth layer; carrying out annealing treatment on a channel hole; forming a second protection layer covering the side wall and the bottom of a substrate; and processing the 3D NAND memory by using a wet etching process and carrying out cavity detection. According to the cavity detection method provided by the invention, the selective epitaxial growth layer is etched until the top of the selective epitaxial growth layer is lower than or flush with the top of the insulating layer, then the substrate is etched by using a wet etching process, and whether the cavity exists in the 3D NAND memory or not is determined by detecting whether the substrate has the etching trace or not. Therefore, the production efficiency and the product yield are improved.

Description

technical field [0001] The present application relates to the technical field of memory manufacturing, in particular to a method for detecting voids in 3D NAND memory. Background technique [0002] NAND flash memory is a better storage device than hard disk drives, and it has been widely used in electronic products as people pursue non-volatile storage products with low power consumption, light weight and high performance. At present, the planar NAND flash memory is close to the limit of practical expansion. In order to further increase the storage capacity and reduce the storage cost per bit, a 3D NAND memory is proposed. [0003] At present, the manufacturing process of 3D NAND memory includes: forming a stack structure in which dielectric layers and sacrificial layers are alternately stacked on the substrate; forming a channel hole through the stack structure in the stack structure; forming a selective epitaxial Growth layer (SEG); the sacrificial layer is removed and fi...

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Application Information

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IPC IPC(8): H01L21/66H01L27/11556H01L27/11582
CPCH01L22/12H10B41/27H10B43/27
Inventor 韩烽陈金星马霏霏
Owner YANGTZE MEMORY TECH CO LTD