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Method for forming barrier layer and method for manufacturing semiconductor device

A manufacturing method and barrier layer technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, coatings, etc., can solve problems such as unevenness

Pending Publication Date: 2021-10-12
エーエスエムアイピーホールディングベーフェー
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, there is a problem that the distribution of dopants in the base layer 100 after drive-in becomes uneven in the height direction of the base layer.

Method used

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  • Method for forming barrier layer and method for manufacturing semiconductor device
  • Method for forming barrier layer and method for manufacturing semiconductor device
  • Method for forming barrier layer and method for manufacturing semiconductor device

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Embodiment Construction

[0054] Hereinafter, with reference to the drawings, embodiments of the present invention will be described in detail. Incidentally, used in the following description, the accompanying drawings, wherein in order to make easily understood, for convenience will feature an enlarged portion, the shape of each component, the size ratio and the like is not limited to the illustrated contents.

[0055] figure 1 Is a method of manufacturing a semiconductor device according to the present embodiment of the invention will be described in the flowchart, Figures 2a ~ 2d Respectively, is figure 1 In step (A) ~ one example of step (D) is a schematic illustration.

[0056] like figure 1 , The method of manufacturing a semiconductor device according to an embodiment of the present invention has the steps of: (A) forming a layer having a three-dimensional configuration; step (B) a barrier layer formed on the substrate layer; using atomic layer deposition (ALD) process step dopant-containing layer ...

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Abstract

Provided is a method for forming a barrier layer by which even when a base layer has a three-dimensional structure with a high aspect ratio, a dopant can be uniformly distributed in the base layer. In the method for forming a barrier layer, the barrier layer is formed on a base layer having a three-dimensional structure before a dopant-containing layer is formed on the base layer. At this time, at least one of a film thickness, a film quality, and a film type of the barrier layer is controlled in a height direction of the three-dimensional structure by using an atomic layer deposition (ALD) process.

Description

Technical field [0001] The present invention relates to a barrier layer forming method and a method of manufacturing the semiconductor device, and more particularly to a barrier layer forming method for doping with a substrate layer in a manufacturing step of a semiconductor device such as a FinFET. Background technique [0002] Conventionally, with high concentration of the semiconductor chip, planar transistors such as MOSFET gradually fine, high speed, and low power consumption. However, in the conventional planar transistor, the so-called short channel effect cannot be suppressed by a gate voltage to perform control, so that the finelation of the planar transistor is extremely low. Thus, the development of three-dimensional transistors that is actively carried out with a fin field effect transistor (hereinafter also referred to as FinFET). [0003] The three-dimensional transistor has a stereoscopic configuration of the gate electrode surrounding the channel portion, thereby ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/316H01L21/318H01L21/336
CPCH01L21/0217H01L21/02164H01L21/0228H01L29/66795H01L21/02274H01L21/2254H01L29/66803H01L21/02211H01L21/02219H01L21/0214H01L21/02129H01L21/022H01L21/2256H01L21/2252H01L21/2225C23C16/045C23C16/345C23C16/308C23C16/45529C23C16/4554C23C16/52
Inventor 中野竜
Owner エーエスエムアイピーホールディングベーフェー