Optimization method and device for DRAMLess SSD NAND programming errors and medium
An optimization method and a technology for optimizing devices, which are applied in static memory, instruments, etc., can solve problems affecting SSD performance, etc., and achieve the effects of ensuring data reliability, improving utilization, and ensuring write performance requirements
Pending Publication Date: 2022-04-29
苏州忆联信息系统有限公司
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Problems solved by technology
[0006] In the DRAMLess SSD, due to the small memory, if you wait until the programming is completed before releasing the write buffer, it will greatly affect the performance of the SSD
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[0044] The technical solutions of the present invention will be clearly and completely described below in conjunction with specific embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0045] It should be understood that when used in this specification and claims, the terms "comprising" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude one or more The presence or addition of other features, integers, steps, operations, elements, components and / or collections thereof.
[0046] It should also be understood that the terminology used in the description of the present invention is for the pur...
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The embodiment of the invention discloses a DRAMLess SSD NAND programming error optimization method and device and a medium. The method comprises the steps that to-be-programmed data is written into a write cache region of an SSD; sending the to-be-programmed data to a buffer register of the NAND from the write cache region; sending the to-be-programmed data in the buffer register of the NAND to a physical array of the storage data of the NAND for programming; after the to-be-programmed data is sent to the buffer register of the NAND, the to-be-programmed data in the write cache region of the SSD is released immediately; after the physical array programming of the storage data of the NAND is completed, feeding back a state of whether programming is successful or not; and resending the data to be programmed in the buffer register of the NAND to the physical array of the storage data of the NAND for programming when the programming of the physical array of the NAND has an error. According to the method, for the SSD of the DRAMLess, the NAND buffer register is used as a data backup recovery area when programming errors occur, the writing performance requirement of the SSD such as the DRAMLess is guaranteed, and the data reliability is also guaranteed.
Description
technical field [0001] The invention relates to a solid-state hard disk, more specifically, an optimization method, device and medium for DRAMLess SSD NAND programming errors. Background technique [0002] With the evolution of SSD interface specifications from SATA to PCIe, the interface factors that restrict SSD performance have been eliminated. How to maximize the NAND writing efficiency is an important consideration in improving the overall writing speed of SSD. [0003] Inside the firmware hard disk, due to cost constraints, its internal fast memory resources are very limited, and ensuring sufficient resources is a necessary condition for improving NAND writing efficiency. In traditional SSDs, in order to combat possible program exceptions, more memory resources need to be cached so that errors can be overwritten on the spot. [0004] As the cost requirements are getting higher and higher, SSDs are gradually adopting the DRAMLess (no DRAM) solution. In resource-constr...
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IPC IPC(8): G11C29/44
CPCG11C29/4401
Inventor 王猛徐伟华韩道静
Owner 苏州忆联信息系统有限公司