High-speed zero-intermediate-frequency IQ delay compensation system based on Gardner algorithm

Abstract

The invention discloses a high-speed zero-intermediate-frequency IQ delay compensation system based on a Gardner algorithm. The high-speed zero-intermediate-frequency IQ delay compensation system comprises a variable-rate interpolation filter, a matched filter, an IQ delay error extraction module, a first-order loop filter, a timing synchronization error extraction module, a second-order loop filter and a digital oscillator. The method can be suitable for receiving narrowband signals, broadband signals and ultra-broadband signals, the symbol rate range is wide, and the application range is wide; the IQ delay correction precision can reach 1 / 2048 symbol delay, and the IQ delay estimation precision is 0.5 ps for a signal with the symbol rate of 1Gsps; the IQ delay correction precision is high, and the correction efficiency is high.

Description

technical field [0001] The invention relates to the field of receiver signal compensation, in particular to a high-speed zero-IF IQ delay compensation system based on Gardner algorithm. Background technique [0002] Commonly used communication receivers include digital IF receivers and zero-IF receivers. In the digital intermediate frequency receiver, the RF front end completes the filtering and amplification processing of the RF signal, and then converts the frequency to the intermediate frequency signal. The intermediate frequency signal enters the A / D converter for sampling after passing through the analog bandpass filter, and then sends it to the FPGA for digital quadrature Down-conversion restores the quadrature I / Q baseband signal, and finally demodulates and decodes it. In the zero-IF receiver, the RF front-end completes the filtering and amplification of RF signals, and then performs analog quadrature down-conversion to obtain quadrature I / Q baseband signals. The ba...

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