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Memory system and control method

A memory system, memory technology, used in instrumentation, input/output to record carriers, computing, etc.

Pending Publication Date: 2022-05-10
KIOXIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This stagnation of instruction completion may become an important factor for the processing of instructions by the controller to be stopped

Method used

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  • Memory system and control method
  • Memory system and control method
  • Memory system and control method

Examples

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Embodiment Construction

[0036] Embodiments will be described below with reference to the drawings.

[0037] figure 1 It is a block diagram showing a configuration example of the information processing system 1 including the memory system of the embodiment. The information processing system 1 includes a host (host device) 2 and an SSD 3 .

[0038] A memory system is a semiconductor memory device configured to write data to and read data from a nonvolatile memory. The memory system can be realized as, for example, SSD 3 including NAND flash memory 5 .

[0039] The SSD3 can also be connected to the host 2 via a cable or a network. Alternatively, the SSD 3 may also be built in the host 2 . As a standard of the logical interface for connecting the host 2 and the SSD 3, the NVMe standard can be used. In the NVMe standard interface, a pair of queues including at least one submission queue (SQ) and a completion queue (CQ) associated with the at least one submission queue (SQ) are used to communicate bet...

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Abstract

A memory system and a control method capable of smoothly executing processing of an instruction from a host are realized. A controller of a memory system performs communication with a host based on an NVMexpress standard. A controller of the memory system determines the number of instructions to be fetched, using the number of free slots among a plurality of slots included in a first completion queue as an upper limit, when instructions should be fetched from a first commit queue. The controller obtains the decided number of instructions from the first commit queue.

Description

[0001] related application [0002] This application enjoys the priority of the basic application based on Japanese Patent Application No. 2020-187076 (filing date: November 10, 2020). This application incorporates the entire content of the basic application by referring to this basic application. technical field [0003] Embodiments of the present invention relate to a memory system and a control method for controlling a nonvolatile memory. Background technique [0004] In recent years, memory systems including nonvolatile memories have been widely used. As one of such memory systems, a solid-state drive (SSD) equipped with a NAND-type flash memory is known. [0005] NVM Express is known as a standard for a logical interface used for communication between a memory system such as an SSD and a host. TM (NVMe TM ). In the NVMe standard interface, the host stores each command in any submission queue in the host. In the interface of the NVMe standard, the controller contai...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06
CPCG06F3/0659G06F3/0679G06F3/0629G06F3/061G06F3/0673G06F3/0604G06F3/0635
Inventor 渡边秀一
Owner KIOXIA CORP