Appts. and method of extending microprocessor data mode

A data mode, microprocessor technology, applied in the field of microelectronics, which can solve the problems of adverse effects in the field of application programs, the inability of microprocessors to support extended data modes, and the inability to support application programs.

Inactive Publication Date: 2003-07-23
IP FIRST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0011] (0010) But even now, some areas of application are adversely affected by the inability of microprocessors to support extended data modes, such as 64-bit and 128-bit data modes
However, in order to support these extended data modes in an architecture that has no remaining opcode values, the existing opcodes must be redefined, which will result in the inability to support legacy applications

Method used

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  • Appts. and method of extending microprocessor data mode
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  • Appts. and method of extending microprocessor data mode

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Embodiment Construction

[0095] (0026) The following description is provided in the context of a specific embodiment and its prerequisites to enable those of ordinary skill in the art to utilize the present invention. However, various modifications to this preferred embodiment will be readily apparent to those skilled in the art, and the general principles discussed herein can be applied to other embodiments as well. Therefore, the present invention is not limited to the specific embodiments shown and described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0096] (0027) The previous article has discussed the background of how to expand its architectural features in today's microprocessors to surpass the capabilities of related instruction sets. In view of this, in figure 1 and figure 2 , an example of a related technique will be discussed. The discussion here highlights the dilemma that microprocessor designers are constantly fac...

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Abstract

An apparatus and method are provided for extending a microprocessor instruction set beyond its current capabilities to allow for extended size operands specifiable by programmable instructions in the microprocessor instruction set. The apparatus includes translation logic and extended execution logic. The translation logic translates an extended instruction into corresponding micro instructions for execution by the microprocessor. The extended instruction has an extended prefix and an extended prefix tag. The extended prefix specifies an extended operand size for an operand corresponding to a prescribed operation, where the extended operand size cannot be specified by an existing instruction set. The extended prefix tag indicates the extended prefix, where the extended prefix tag is an otherwise architecturally specified opcode within the existing instruction set. The extended execution logic is coupled to the translation logic. The extended execution logic receives the corresponding micro instructions and performs the prescribed operation using the operand.

Description

[0001] Comparison with Related Applications [0002] (0001) This application claims the relevant rights and interests of the following U.S. application: Case No. 10 / 227008, filed on August 22, 2002. [0003] Taiwan application number filing date DOCKETNUMBER patent name 91116957 7 / 30 / 02 CNTR: 2176 extended microprocessor instruction set Device and method 91116958 7 / 30 / 02 CNTR: 2186 A device for executing conditional instructions and method 91124008 10 / 18 / 02 CNTR: 2187 Selectively control memory properties device and method 91116956 7 / 30 / 02 CNTR: 2188 Optionally control condition codes with device and method for writing 91116959 7 / 3O / 02 CNTR: 2189 Increase the memory of the microprocessor Quantitative Mechanism ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/22G06F9/30
CPCG06F9/30185
Inventor G・葛兰・亨利罗德・E・胡克泰瑞・派克斯
Owner IP FIRST
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