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High speed serial on-line device and method with amplitude lowering function

A high-speed serial and on-line device technology, applied in the direction of instruments, electrical digital data processing, digital data processing components, etc., can solve problems such as difficulty and short time

Inactive Publication Date: 2004-02-11
VIA TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as the speed of high-frequency signals becomes faster and faster, each bit time is very short, for example, it may only be 400ps under the PCI high-speed structure. This is the inspection circuit and modulation circuit of the amplitude reduction technology. It is very difficult to complete the operation within the time

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  • High speed serial on-line device and method with amplitude lowering function
  • High speed serial on-line device and method with amplitude lowering function
  • High speed serial on-line device and method with amplitude lowering function

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Embodiment Construction

[0029] In order to make the above-mentioned purposes, features, and advantages of the present invention more comprehensible, a preferred embodiment is specifically cited below, together with the accompanying drawings, as follows:

[0030] Please refer to FIG. 2 , which shows a schematic diagram of a high-frequency serial connection device with de-emphasis function according to a preferred embodiment of the present invention. The high frequency serial connection device 200 receives parallel data [D0, D1, . . . D9], and outputs transmit differential pairs TDP and TDN accordingly. Wherein, the high frequency serial connection device 200 includes a parallel-to-serial unit 210 , a pre-driver unit (pre-driver) 230 and an output driver unit 250 . The parallel-to-serial unit 210 in FIG. 2 takes ten bits of parallel data [D0, D1, . . . D9] as an example, and serializes the parallel data into serial data. However, the parallel-to-serial unit 210 of the present invention generates a ser...

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Abstract

The high speed serial on-line deemphasis device is used to receive serial data and output deemphasized transmission differential pair. The high speed serial on-line deemphasis device disease includes a parallel-to-serial unit, fore-stage driver unit and output driver unit. The parallel-to-serial unit is for receiving parallel data and converting the parallel data into serial data and delayed serial data. The fore-stage driver unit outputs differential data pair based on the serial data and outputs inverse delayed differential data pair based on the delayed serial data. The output driver unit receives the differential data pair and the inverse delayed differential data pair and outputs deemphasized transmission differential pair.

Description

technical field [0001] The present invention relates to a high-speed serial connection device, and more particularly to a high-speed serial connection device with a de-emphasis function and a method thereof. Background technique [0002] Due to the increasing demand for high-speed data transmission, the original parallel transmission structure, such as the PCI structure, has gradually become insufficient. The parallel transmission structure uses multiple connection lines, and it is necessary to control the clock of each connection line to maintain synchronization. However, under high-speed data transmission, it is very difficult to achieve clock synchronization of multiple connection lines. [0003] Generally, the current high-speed transmission system adopts serial transmission, such as PCI Express architecture. Among them, the data rate of the PCI high-speed structure can reach more than 2.5GHz, but such a high-frequency signal will cause great signal loss on the circuit...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/00G06F13/00
Inventor 张棋
Owner VIA TECH INC