Sbox module optimizing method and circuit in AES encryption and decryption circuit

An optimization method, encryption and decryption technology, applied in the direction of encryption device with shift register/memory, etc., can solve the problems of scale, power consumption, high cost, unfavorable production, application in daily life, etc.

Inactive Publication Date: 2006-01-11
VIMICRO CORP
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Problems solved by technology

However, in the AES encryption and decryption algorithm, if we want to support both encryption and decryption operations, we need at least 16 GF256 inversion operation circuits, and the GF256 inversion operation circuit is usually implemented by a look-up table circuit, with a scale of 800* 16=about 12800 gates, its scale, power consumption, and cost are still very large, which is not conducive to production and application in life

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  • Sbox module optimizing method and circuit in AES encryption and decryption circuit
  • Sbox module optimizing method and circuit in AES encryption and decryption circuit
  • Sbox module optimizing method and circuit in AES encryption and decryption circuit

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Embodiment Construction

[0053] The Sbox module optimization method and optimization circuit in the AES algorithm of the present invention will be described in detail below with reference to the accompanying drawings. The figures given are for illustration only and do not limit the invention.

[0054] According to the Sbox module optimization method in the AES algorithm of the present invention comprises the steps:

[0055] (1) Map element X on GF256 to elements b and c on GF16 through linear transformation T

[0056] In order to convert the inversion on GF256 to the inversion on GF16 to reduce the scale of the circuit, a linear transformation T is needed to map the elements on GF256 to the elements on GF16. Through this linear transformation T, each element on GF256 can be expressed by a first-degree polynomial on GF16. In order to construct this linear transformation, a quadratic polynomial p(x) reduced on GF16 is first required. The so-called approximation refers to substituting any element on G...

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Abstract

This invention relates to the sbox module optimization method and a circuit in AES algorithm, which reduces the realized scale of AES algorithm circuit, power loss and realization cost by optimizing the GF256 inversion circuit, including: 1, imaging element x on the GF 256 to element b, c on GF16 by linear transformation T 2, constructing related GF16, defining the addition, multiplication and inversion operation on said GF16, 3, structuring a primary multinomial of element on GF16 and carrying out addition, multiplication and inversion operation to get the inversion p q of b, c on GF16 4, setting up a linear transformation one over T to realize the image of p, q on GF16 to the elements on GF256 so as to get the inverted Y=one over T(pq) of element x on GF256. This invention also gets optimized circuit including image circuit, GF16 operation circuit and inversion image circuit.

Description

technical field [0001] The invention relates to AES encryption and decryption technology, in particular to an optimization method and an optimization circuit of an Sbox module in an AES encryption and decryption circuit. Background technique [0002] The AES algorithm is the abbreviation of The Advanced Encryption Standard (Advanced Encryption Standard). It is a specification for encrypting electronic data published by the National Institute of Standards and Technology (NIST). It is the most widely used block cipher algorithm in the field. Specifically, AES is an iterative, symmetric-key block cipher that can use 128-, 192-, and 256-bit keys, and encrypts and decrypts data with 128-bit (16-byte) blocks. Unlike public-key cryptography, which uses a key pair, symmetric-key cryptography uses the same key to encrypt and decrypt data. The encrypted data returned by a block cipher has the same number of bits as the input data. Iterative encryption uses a loop structure in which...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/06
Inventor 杨柱腰健勋霍晓方
Owner VIMICRO CORP
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