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Method and system for reading data to memory

A data writing, controller technology, applied in the direction of digital memory information, static memory, memory system, etc.

Inactive Publication Date: 2006-02-15
S3 GRAPHICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] One of the challenges of the controller 102 is to accurately time to provide the data strobe signal DQS, the data signal PD and the clock pulse signal MCLK to the memory 104, so that the data is correctly locked into the memory 104

Method used

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  • Method and system for reading data to memory
  • Method and system for reading data to memory
  • Method and system for reading data to memory

Examples

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Embodiment Construction

[0032] The present invention is illustrated in detail by the following examples and accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like components.

[0033] image 3 is a circuit diagram of a control circuit according to the first specific example of the present invention. The phase locked loop (phaselocked loop) 310 provides a clock signal CLK and another clock signal CLKQ, wherein the clock signal CLKQ is 90 degrees ahead or ahead of the clock signal CLK. The clock signals CLK and CLKQ can be generated from the same reference clock signal. At node A, the clock signal CLK is sent to a clock tree buffer (CTS) 312 to form a signal CTS_CLK (not shown). The signal CTS_CLK is sent to an inverter 322 to form a signal CTS_CLK˜ (not shown) that is 180 degrees complementary to the clock signal CTS_CLK. At node B, clock signal CLKQ is sent through clock tree buffer (CTS) 314 to form signal CTS_CLKQ (...

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Abstract

Methods and systems consistent with this invention write data to a memory. Such methods and systems may generate a clock signal, generate an intermediate clock signal from the clock signal using a clock tree buffer, delay the intermediate clock signal to form a data strobe signal, and write the data to the memory using the data strobe signal and a memory clock signal. Such methods and systems may also delay the intermediate clock signal to form the memory clock signal.

Description

[0001] The application for the present invention is a divisional application with the application number of 03107724.2, the application date of April 2, 2003, and the title of "Method and System for Writing Data into Internal Memory". technical field [0002] The invention relates to a method and a controller circuit for writing data into a memory. Background technique [0003] Generally speaking, the memory controller circuit is used to regulate the reading / writing of data from / to the memory. For example, the data may come from a central processing unit (CPU). As the capacity of memory chips increases and CPUs become faster and faster, it is necessary to access data in memory chips at a higher rate. [0004] figure 1 A block diagram of the connection between the controller 102 and the memory 104 is shown. In this figure, there are four signals connected between the controller 102 and the memory 104: a clock signal (clock signal) MCLK, a data signal (data signal) PD, a co...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/00G06F12/00
Inventor 洪成冠路克・彼森
Owner S3 GRAPHICS