Interative encode method and system
An iterative decoding and decoding technology, which is applied in the direction of error correction/error detection by combining multiple code structures, can solve the problem of large number of iterations
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no. 1 example
[0064] figure 2 It is a block diagram of the Turbo code decoding system according to the first embodiment of the present invention, wherein S represents the received information bit, P1 represents the received check bit of the first channel, and P2 represents the received interleaved second channel check bit. Check position. The first decoder 20 and the second decoder 25 represent soft-in and soft-out decoders (MAP or SOVA), the first decoder 20 outputs the hard decision value of the information bit and the outer information, and the second decoder 25 outputs the external information of the information bit S and the hard decision value of the second parity bit, and the entire Turbo decoding is a serial iterative process.
[0065] like figure 2 As shown, the decoding system of the first embodiment of the present invention includes: a first decoder 20, which is used for decoding the input first channel check bit P1 and the information bit S, and outputs the first external in...
no. 2 example
[0078] image 3 is a block diagram of an iterative decoding system according to a second embodiment of the present invention. The difference between the decoding system of the second embodiment and the first embodiment is that: in the first embodiment, the convolutional code encoder is arranged downstream of the first positive interleaver, and the convolutional code is judged in the check judger. Whether the check sequence output by the encoder and the check bit hard-decision sequence output by the second decoder are the same; in the second embodiment, the convolutional encoder is set downstream of the deinterleaver, and the check decider It is judged whether the check sequence output by the convolutional encoder is the same as the check bit hard-decision sequence shown by the first decoder.
[0079] like image 3 As shown, the iterative decoding system according to the second embodiment of the present invention includes: a first decoder 30, which is used for decoding the in...
no. 3 example
[0092] Figure 4 A block diagram of a Turbo code decoding system according to the third embodiment of the present invention is shown, wherein S represents the received information bit, P1 represents the received first channel parity bit, and P2 represents the received interleaved second channel. Road check digit. The first decoder 40 and the second decoder 45 represent soft-in and soft-out decoders (MAP or SOVA), the first and second decoders output the outer information of the information bit S and the hard decision value, the entire Turbo Decoding is a serial iterative process.
[0093] like Figure 4 As shown, the decoding system of the third embodiment of the present invention includes: a first decoder 40, which is used for decoding the input first channel check bit P1 and the information bit S, and outputs the first external information, the third an information bit hard decision sequence and a first parity bit hard decision sequence; the first positive interleaver 41 ...
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