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Semiconductor device and method for manufacturing it

一种制造方法、半导体的技术，应用在半导体/固态器件制造、半导体器件、电气元件等方向，能够解决偏压温度不稳定等问题

Active Publication Date: 2006-08-09
TAIWAN SEMICON MFG CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

High trap density can also cause Frenkel-Poole tunneling to cause leakage current and cause bias temperature instability

Method used

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  • Semiconductor device and method for manufacturing it
  • Semiconductor device and method for manufacturing it
  • Semiconductor device and method for manufacturing it

Examples

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Embodiment Construction

[0045] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the preferred embodiments are specifically cited below, together with the accompanying drawings, and are described in detail as follows:

[0046] figure 1 What is shown is a cross-sectional view of an integrated circuit in a manufacturing process. The drawings are for illustration purposes only and are not drawn to scale. Wherein, the semiconductor substrate 101 is preferably a silicon wafer, but may also include Ge, SiGe, strained silicon (strained silicon), strained germanium (strained germanium), GaAs, silicon insulator (siliconon insulator, SOI), germanium-covered insulator (germanium on insulator, GOI), a combination of the above materials, or a multi-layer stack structure such as Si / SiGe.

[0047] The first nitrogen-containing layer 103 can be deposited by jet vapor deposition (JVD) method. In a preferred embodiment, the thickness of t...

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Abstract

The invention relates to a semiconductor device with high dielectric constant material, which includes a substrate and the high dielectric constant material formed on the substrate. The high dielectric constant material is preferably amorphous HfSiON. In a preferred embodiment, the high dielectric constant material contains nitrogen. In a preferred embodiment, the silicon nitride layer is formed on the high-k material using spray vapor deposition. After the deposition of this JVD nitride layer, this layer has a lower charge trap density and has comparable carrier mobility to oxide or oxynitride and better equivalent oxide thickness. The present invention may also include a second nitrogen-containing layer formed between the high dielectric constant material and the gate electrode as a diffusion barrier layer. The present invention reduces the problems caused by oxygen vacancies formed in high dielectric constant materials, thereby reducing the Fermi level pinning effect.

Description

technical field [0001] The present invention relates to a semiconductor device and its manufacturing method, more particularly, to a semiconductor device with high dielectric constant material and its manufacturing method. Background technique [0002] As the size of a metal oxide semiconductor field effect transistor (MOSFET) shrinks, the thickness of a gate oxide (also referred to as a gate dielectric) also decreases accordingly. The purpose of this reduction is due to the need to consider the overall device ratio, for example, when the width of the gate conductor (gate conductor) is reduced, the size of other devices must also be reduced in proportion to maintain an appropriate device size, and Maintain the operating performance of the device. Another purpose of reducing the thickness of the gate oxide is to increase the drain current of the transistor, and the increase of the drain current of the transistor must be achieved by reducing the thickness of the gate dielectr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/51H01L21/336H01L21/283
CPCH01L29/518H01L29/513H01L29/78H01L29/517H01L21/28194H01L29/1054H01L21/28202
Inventor 王志豪蔡庆威陈尚志
Owner TAIWAN SEMICON MFG CO LTD
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