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Semiconductor device, method of manufacturing a quantum well structure and a semiconductor device comprising such a quantum well structure

A technology of semiconductors and quantum wells, applied in semiconductor devices, transistors, electrical components, etc.

Active Publication Date: 2010-12-29
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] A disadvantage of known field effect transistors with multiple SiGe quantum wells is that the improvement is limited to PMOS devices
Fabrication of multiple SiGe quantum wells is difficult due to release of the strained SiGe layer and Ce diffusion from the SiGe quantum wells to the surface

Method used

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  • Semiconductor device, method of manufacturing a quantum well structure and a semiconductor device comprising such a quantum well structure
  • Semiconductor device, method of manufacturing a quantum well structure and a semiconductor device comprising such a quantum well structure
  • Semiconductor device, method of manufacturing a quantum well structure and a semiconductor device comprising such a quantum well structure

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Experimental program
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Embodiment Construction

[0059] exist figure 1 In an embodiment of the semiconductor device 1, the substrate 2 is provided with 10 17 at / cm 3 A doped p-type silicon (100) substrate on which a multilayer structure 3 is grown. Before growing the multilayer structure, the native oxide layer of the substrate is removed. On the substrate, a multilayer structure comprising a 20 nm buffer layer of undoped silicon was grown epitaxially. The quantum well structure 4 is subsequently grown by MBE epitaxy. The quantum well structure 4 includes a 3nm Y 2 o 3 ( figure 1 Number 6 in), 5nm Si ( figure 1 Number 5) and Y in 3nm 2 o 3 ( figure 1 number 6' in . A spacer layer 21 is then grown and a second quantum well 9 is epitaxially grown on top of the spacer layer. In this particular embodiment, the second quantum well is identical to the first quantum well. The second quantum well 9 may comprise a different high-k material 8 and a different semiconductor layer 7 than the first quantum well 4 .

[00...

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Abstract

A semiconductor device (1) and a method are disclosed for obtaining on a substrate (2) a multilayer structure (3) with a quantum well structure (4). The quantum well structure (4) comprises a semiconductor layer (5) sandwiched by insulating layers (6,6'), wherein the material of the insulating layers (6,6') has preferably a high dielectric constant. In a FET the quantum wells (4,9) function as channels, allowing a higher drive current and a lower off current. Short channel effects are reduced. The multi-channel FET is suitable to operate even for sub-35 mn gate lengths. In the method the quantum wells are formed by epitaxial growth of the high dielectric constant material and the semiconductor material alternately on top of each other, preferably with MBE.

Description

technical field [0001] The present invention relates to a semiconductor device comprising a substrate having a multilayer structure including a quantum well structure comprising semiconductor layers sandwiched by further layers. [0002] The present invention also relates to a method for manufacturing a quantum well structure on a substrate, comprising the steps of: [0003] forming a layer of electrically insulating material, [0004] A layer of semiconductor material is formed. [0005] The invention also relates to a method of manufacturing a semiconductor device comprising such a quantum well. Background technique [0006] Paper "Multiple SiGe Quantum Wells-Novel Channel Architecture for 0.12CMOS", J.Alieu, T.Skotnicki, J.-L.Regolini and G.Bremond, Proceedings of 29 th European Solid-State Device Research Conference, Leuven, Belgium, September 13-15, 1999, pages 292-295 discloses a field effect transistor. The field effect transistor is a MOSFET with a quantum well...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/778H01L29/15H01L29/10H01L29/78H01L29/786
CPCH01L29/7782H01L29/78687H01L29/7838H01L29/152H01L29/78696H01L29/1054Y10S438/962H01L29/778H01L29/15
Inventor Y·波诺马雷
Owner NXP BV
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