Field-programmable gate array configuration circuit, radio-frequency unit and magnetic resonance system
a field-programmable gate array and configuration circuit technology, applied in the field of electronic elements, can solve the problem that the fpga architecture cannot achieve configuration, and achieve the effect of improving system security
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first embodiment
[0034]As noted above, FIG. 1 is a structural diagram of an FPGA configuration circuit according to the present invention.
[0035]As FIG. 1 shows, the configuration circuit 100 has:[0036]n (n being a natural number of at least 2) FPGA modules 51, 52 . . . 5n which are individually connected to a bus 3;[0037]a first storage device 1, storing a configuration file 11 in the form of firmware;[0038]a second storage device 2, storing a configuration file 21 in the form of loadware;[0039]one of the n FPGA modules (e.g. FPGA module 5n) being connected to the first storage device 1 and the second storage device 2 separately, the FPGA module 5n being a master FPGA module, while the other FPGA modules are slave FPGA modules;[0040]an input end 4, connected to the first storage device 1 and the second storage device 2 separately, and providing a selection signal for selecting one of the first storage device 1 and the second storage device 2;[0041]wherein the FPGA module 5n connected to the first st...
second embodiment
[0050]As noted above, FIG. 2 is a structural diagram of an FPGA configuration circuit according to the present invention.
[0051]As FIG. 2 shows, the configuration circuit 200 has:[0052]n (n being a natural number of at least 2) FPGA modules 51, 52 . . . 5n which are individually connected to a bus 3;[0053]a first storage device 1, storing a configuration file 12 in the form of firmware, a version number of the configuration file being 1;[0054]a second storage device 2, storing a configuration file 22 in the form of firmware, a version number of the configuration file being 2;[0055]one of the n FPGA modules (e.g. FPGA module 5n) being connected to the first storage device 1 and the second storage device 2 separately, the FPGA module 5n being a master FPGA module, while the other FPGA modules are slave FPGA modules;[0056]an input end 4, connected to the first storage device 1 and the second storage device 2 separately, and providing a selection signal for selecting one of the first sto...
third embodiment
[0065]As noted above, FIG. 3 is a structural diagram of an FPGA configuration circuit according to the present invention.
[0066]As FIG. 3 shows, the configuration circuit 300 has:[0067]n (n being a natural number of at least 2) FPGA modules 51, 52 . . . 5n which are individually connected to a bus 3;[0068]a first storage device 1, storing a configuration file 13 in the form of loadware, a version number of the configuration file being 1;[0069]a second storage device 2, storing a configuration file 23 in the form of loadware, a version number of the configuration file being 2;[0070]one of the n FPGA modules (e.g. FPGA module 5n) being connected to the first storage device 1 and the second storage device 2 separately, the FPGA module 5n being a master FPGA module, while the other FPGA modules are slave FPGA modules;[0071]an input end 4, connected to the first storage device 1 and the second storage device 2 separately, and providing a selection signal for selecting one of the first sto...
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