Methods and apparatus for implementing a cryptography engine

Inactive Publication Date: 2002-05-23
AVAGO TECH WIRELESS IP SINGAPORE PTE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Conventional software and hardware designs for implementing various cryptography algorithms including the DES and the triple DES algorithms have significant performance limitations.
Although specialized hardware cryptography accelerators can often outperform software written to perform the same tasks, conventional hardware cryptography accelerators have significant performance limitations for implementing cryptography algorithms including the DES and the triple DES algorithms.
Some performance bottlenecks include limitations related Sbox logic and clock synchronization.

Method used

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  • Methods and apparatus for implementing a cryptography engine
  • Methods and apparatus for implementing a cryptography engine
  • Methods and apparatus for implementing a cryptography engine

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Embodiment Construction

[0027] Reference will now be made in detail to some specific embodiments of the invention including the best modes contemplated by the inventors for carrying out the invention. Examples of these specific embodiments are illustrated in the accompanying drawings. While the invention is described in conjunction with these specific embodiments, it will be understood that it is not intended to limit the invention to the described embodiments. On the contrary, it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention...

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Abstract

Methods and apparatus are provided for implementing a cryptography engine for cryptography processing. A variety of techniques are described. A cryptography engine such as a DES engine running at a clock frequency higher than that of surrounding logic can be synchronized with the surrounding logic using a frequency synchronizer. Sbox logic output can be more efficiently determined by intelligently arranging Sbox input.

Description

[0001] This application claims priority under U.S.C. 119(e) from U.S. Provisional Application No. 60 / 235,190, entitled "E-Commerce Security Processor," as of filing on Sep. 25, 2000, the disclosure of which is herein incorporated by reference for all purposes.[0002] 1. Field of the Invention[0003] The present invention relates to implementing a cryptography engine. More specifically, the present invention relates to methods and apparatus for efficient performance of a cryptography algorithm such as a DES algorithm.[0004] 2. Description of Related Art[0005] Conventional software and hardware designs for implementing various cryptography algorithms including the DES and the triple DES algorithms have significant performance limitations. Many designs for performing cryptography processing are well known in the art and are discussed, for example, in Applied Cryptography, Bruce Schneier, John Wiley & Sons, Inc. (ISBN 0471128457), incorporated by reference in its entirety for all purposes...

Claims

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Application Information

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IPC IPC(8): G06F7/72H04L9/06H04L9/12H04L9/18H04L29/06
CPCG06F7/49936G06F7/722H04L63/0428H04L9/0625H04L2209/125H04L2209/24H04L9/12
Inventor THAM, TERRY K.LAI, ERROL
Owner AVAGO TECH WIRELESS IP SINGAPORE PTE
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