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Substrate design of a chip using a generic substrate design

a generic substrate and chip technology, applied in the field of multi-chip module packaging methods and systems, can solve the problems of significant design effort, prior art approach to mcm packaging design problems, and much custom design effort to package mcm

Inactive Publication Date: 2003-03-13
GLOBALFOUNDRIES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This represents significant design effort.
The prior art has approached MCM packaging design problems by various techniques.
These CAD tools for packaging MCM generally require several unique substrate designs for a given physical (menu) chip size having varying number of I / Os for each die, resulting in much custom design effort to package the MCM.

Method used

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  • Substrate design of a chip using a generic substrate design
  • Substrate design of a chip using a generic substrate design
  • Substrate design of a chip using a generic substrate design

Examples

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Embodiment Construction

[0027] In FIG. 2a, the invention determines which die has the greatest number of I / O signals. Once this determination is made, the die 22 (a chip in exemplary form), is referred to as a "generic" chip. This substrate design includes multiple redistribution layers R1 through R6 (as shown) that form the basis of a "generic" substrate design. The upper layers of the redistribution region 23 for the chip 22 are the same as chip 21 (shown in FIG.3a), except for layer R6. This composite substrate design includes all "used" I / O signal connections and "unused" I / O signal connections for all chips having this same chip size. The invention wires all the "used" I / O wiring through vias in the redistribution section 23 to an interfacing BSM layer 43, regardless of magnitude of potential signals (unused) that are wired at least one layer above the customized BSM layer. When a subsequent different substrate design is required, the "generic" substrate design can be modified by customizing the fanne...

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Abstract

A method of substrate design of an multilayer ceramic module that uses menu die of the same size is provided. One of these menu die provides a "generic" substrate design having internal wiring with greatest number of input / output (I / O) signal leads of all the dice available. Middle (redistribution) layers include electrical interconnections for both power and the I / O signal lead wires between the dice interface terminals and a bottom surface metallurgy (BSM) layer that has electrical connector pads by use of a customization layer.

Description

[0001] 1. Field of the Invention[0002] The present invention relates to a method and system of packaging a multi-chip module having the same sized dies and fabricating such a module.[0003] 2. Description of the Related Art[0004] As very large scale integrated (VLSI) circuits, known as dies or chips, become more dense, there is a need in the art to have semiconductor packaging structures that can take full advantage of the density and speed of state of the art VLSI devices. Packaging of such devices is by use of multi-chip modules (MCMs), which are normally mounted onto cards or boards. These MCMs accept dies that are bonded to pads on a top surface metallurgy (TSM) layer of the MCM. These TSM pads are interconnected to a bottom surface metallurgy (BSM) layer through vias to pins on a bottom surface by using wiring, wherein the vias pass through multiple intermediary redistribution layers and wiring layers. The TSM layer typically has pads made by controlled collapse chip connections...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L23/538H05K1/00H05K1/03
CPCH01L23/5382H01L2224/16H01L2924/15174H01L2924/15312H01L2224/16235H05K1/0298H05K1/0306H05K2203/061H05K1/0287
Inventor BHATIA, HARSARAN S.BRYANT, RAYMOND M.KADAKIA, SURESHLONG, DAVID C.WALLING, PAUL R.
Owner GLOBALFOUNDRIES INC