Method of making microelectronic packages including electrically and/or thermally conductive element

Abstract

A method of manufacturing a plurality of microelectronic packages including electrically and / or thermally conductive elements. The method includes providing a support structure having a plurality of protrusions and depressions extending outwardly from the support. A conductive element is then mated to the support structure in a male-to-female relationship. The depressions formed in the support structure and conductive element are used to house a microelectronic element such as a semiconductor chip. A substrate is provided so as to cover substantially each depression located in the conductive element. Leads interconnect contacts to the chip to terminals on the substrate. A curable encapsulant material may be deposited into the depression so as to protect and support the leads and the microelectronic element. Additionally, the curable encapsulant material forms part of the exterior of a single resulting chip package once the assembly is diced and cut into individual packages.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a divisional of U.S. patent application Ser. No. 10 / 607,289 filed Jun. 26, 2003, which claims the benefit of U.S. Provisional Application No. 60 / 391,814 filed on Jun. 27, 2002, the disclosures of which are hereby incorporated herein by reference.BACKGROUND OF THE INVENTION [0002] The present invention relates to methods of making microelectronic assemblies, such as semiconductor chip packages, including an electrically and / or thermally conductive element. [0003] Modern electronic devices utilize semiconductor chips, commonly referred to as “integrated circuits”, which incorporate numerous electronic elements. These chips are mounted on substrates that physically support the chips and electrically interconnect each chip with other elements of a circuit. The substrate may be a part of a chip package including terminals for interconnecting the chip with external circuit elements. The interconnection between the chip and...

AI Technical Summary

Benefits of technology

[0014] Amicroelectronic element is disposed within the space. An encapsulant includes an interior portion at least partially filling the space and at least partially surrounding the microelectronic element, and an exterior portion being disposed outside of said interior space in contact with the conductive element, said portions of said encapsulant being connected to one another through said one or more openings in the conductive element. Stated another way, in this aspect of the invention, portions of the encapsulant are exposed at the exterior of the assembly, desirably along the side walls of the conductive element. For example, where the conductive element includes multiple pillars defining the side walls, portions of the encapsulant fill the gaps in the side walls so that these portions are exposed at the outside of the assembly. Thus, even where the conductive element does not provide a complete, continuous covering over the microelectronic element, the encapsulant fills the gaps. The encapsulant exposed at the exterior of the assembly may also serve to protect the conductive element from mechanical damage.

Problems solved by technology

Assembling such individual elements, commonly known as “cans”, with each semiconductor chip is costly and time-consuming.

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