Method of forming a small contact in phase-change memory and a memory cell produced by the method

Abstract

A method of fabricating a phase-change memory cell is described. The cross-sectional area of a contact with a phase-change memory element within the cell is controlled by a width and an exposed length of a bottom electrode. The method allows the formation of very small phase-change memory cells.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates generally to semiconductor fabrication methods and, more particularly, to fabrication of a phase-change memory cell. [0003] 2. Description of Related Art [0004] Electrically writable and erasable phase-change materials have traditionally been used for memory devices. Phase-change materials, which may be formed of chalcogenide materials, can be electrically switched between two structural states of generally crystalline and generally amorphous local order. The generally crystalline state is a phase in which the material's atoms and / or electrons form a repeatable lattice structure, whereas the atoms and / or electrons of the generally amorphous state are randomly distributed. The structural state can also be switched among a range of detectable structural states of local order between the extremes of completely crystalline and completely amorphous states. [0005] Currently favored chalcogeni...

AI Technical Summary

Benefits of technology

The present invention provides a method for forming a phase-change memory cell with a small cross-sectional area where self-aligned contact between a phase-change memory element and a bottom electrode is established. This is achieved by controlling the size of the cross-sectional area by forming a bottom electrode above a substrate, the bottom electrode having a first dimension and a second dimension. A phase-change material is disposed on the second portion of the bottom electrode, thereby forming a contact between the phase-change material and the bottom electrode. The method also includes disposing a bit line and an isolation device in a memory cell, and a bottom electrode on the isolation device. The bottom electrode has a width and an exposed length, and a phase-change material is disposed on the bottom electrode, such that a contact between the bottom electrode and the phase-change material has a cross-sectional area equal to a product of the width and the exposed length. The present invention also includes a method for resetting and setting the phase-change memory cell, as well as an array of memory cells. The technical effects of the invention include reducing the size of the memory cell, improving the stability of the memory cell, and increasing the efficiency of the memory cell.

Problems solved by technology

It is known that chalcogenide phase-change memory is not easy to incorporate into a CMOS circuit because the chalcogenide material requires a relatively high current density to change its state.

This technique can reduce the cross-sectional area, but the shrinking ratio is limited by the spacer thickness.

The shrinkage ratio can be limited.

Thus, it can be difficult to scale down the chalcogenide parts in this fashion.

There can be additional problems once the pores are scaled down.

For instance, the uniformity of the pore-to-pore diameters can be poor.

Moreover, the small pores can place constraints on the chalcogenide deposition process since it will be more difficult to deposit materials into the tiny openings.

For example, in the context of pores formed using the process of the preceding paragraph, overhang of the spacer may partially or fully occlude the pore, further compromising the reliability of the deposition procedure.

If the bottoms of the pores receive poor bottom coverage, the electrodes beneath them may not be able to predictably change the phases of the chalcogenide parts.

If the phases are not repeatable when a given current is applied, the memory cell cannot reliably store data.

Another critical issue arises in aligning phase-change material with a contacting electrode.

Because of the large current densities which may be involved, even relatively small misalignments may create large changes in current density which may adversely affect the ability to program phase-change memory cells.

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