Controller and method for power-down mode in memory card system

Inactive Publication Date: 2006-08-03
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0014] In another aspect of the invention, a method of controlling a power-down mode in a memory card, including the steps of: receiving a request for data from a host; storing the number of data blocks

Problems solved by technology

Such a memory card controller may consume more power than necessary becaus

Method used

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  • Controller and method for power-down mode in memory card system
  • Controller and method for power-down mode in memory card system
  • Controller and method for power-down mode in memory card system

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Embodiment Construction

[0020] Preferred embodiments of the present invention will be described below in more detail with reference to the accompanying drawings. The present invention may, however, be embodied in different forms and should not be constructed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numerals refer to like elements throughout the specification.

[0021] Hereinafter, it will be described about an exemplary embodiment of the present invention in conjunction with the accompanying drawings.

[0022]FIG. 2 is a block diagram illustrating a memory card system 200 in accordance with a preferred embodiment of the invention.

[0023] Referring to FIG. 2, the memory card system 200 is composed of a host 200 and a memory card 210 embedded in the host 220.

[0024] The host 220 may be a digital camera, a digital camcorder, an MP3 ...

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Abstract

Disclosed is a controller and method for regulating a power-down mode in a memory card system. The memory card controller includes a central processor unit, a direct memory accessing (DMA) unit, a buffer, and a power-down detector. The central processor unit accepts commands from a host and the DMA unit stores the number of blocks requested by the host in response to instructions of the central processor unit. The buffer stores data that are read from an external storage device through the DMA unit. The power-down detector outputs a control signal to regulate a system clock by means of detecting a storage condition of the buffer and a read-out condition of the host. As the power-down mode begins, if the host does not read data stored in the buffer even when the buffer is full with data, it is possible to reduce power consumption by the memory card controller.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This U.S. non-provisional patent application claims priority under 35 U.S.C. § 119 of Korean Patent Application 2005-10054 filed on Feb. 3, 2005, the entire contents of which are hereby incorporated by reference.BACKGROUND OF THE INVENTION [0002] 1. Technical Field [0003] The present invention is concerned with memory card systems, which in particular relates to a controller of a memory card system having a large-capacity storage unit for storing data. [0004] 2. Description of the Related Art [0005] Memory cards generally include a storage unit and a controller regulating the storage unit. Exemplary memory cards include Multi-Media Cards (MMC), Secure Digital (SD) cards, Compact Flash cards, and Memory Sticks, each kind being different in operation speed, size, and security level. The memory cards are constructed in small dimensions and are able to store data larger than several-hundreds Mega bytes. Thus, they are widely used in portabl...

Claims

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Application Information

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IPC IPC(8): G06F1/28
CPCG06F1/3203G06F1/3275Y02B60/1228Y02B60/32Y02B60/1225Y02D10/00Y02D30/50E02D5/40E02D7/26E02D13/04
Inventor YANG, SIN-HO
Owner SAMSUNG ELECTRONICS CO LTD
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