System with a defect tolerant configurable IC

Abstract

Some embodiments of the invention provide a system that includes a first defect tolerant configurable integrated circuit and a second IC communicatively coupled to the defect tolerant configurable first IC.

Description

CLAIM OF BENEFIT TO U.S. PATENT APPLICATIONS[0001]This application is a continuation in-part to U.S. patent application Ser. No. 11 / 081,820, filed Mar. 15, 2005, entitled “Method For Manufacturing a Programmable System in Package,” and U.S. patent application Ser. No. 11 / 081,841, filed Mar. 15, 2005, entitled “Programmable System in Package.”FIELD OF THE INVENTION[0002]The present invention is directed towards a system with a defect tolerant configurable IC.BACKGROUND OF THE INVENTION[0003]The use of configurable integrated circuits (“IC's”) has dramatically increased in recent years. One example of a configurable IC is a field programmable gate array (“FPGA”). An FPGA is a field programmable IC that has an internal array of logic circuits (also called logic blocks) that are connected together through numerous interconnect circuits (also called interconnects) and that are surrounded by input / output blocks. Like some other configurable IC's, the logic circuits and the interconnect ci...

AI Technical Summary

Benefits of technology

The PSiP approach enhances manufacturing yield by allowing for the use of ICs with defects, reducing waste and optimizing fabrication processes, while providing a flexible and efficient integration of functionalities without the need for extensive design and layout of circuitry.

Problems solved by technology

This can be problematic since each macroblock may have a different optimal fabrication technology (e.g., a memory macroblock might be optimally manufactured at 90 nm, while an analog macroblock might be optimally manufactured at 180 nm).

Another drawback of a SoC is that the design process is often extensive, cumbersome and expensive.

However, the SiP approach does suffer from the known “good-die” problem.

It is known that most manufacturing processes do not always produce “good dies”.

In other words, most manufacturing processes typically produce defective IC's (i.e., IC's that because of a manufacturing defect fail to perform operations for which they are designed).

The good-die problem is particularly troublesome in SiP's as one bad dies in a SiP requires several other dies to be discarded.

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