Semiconductor device and manufacturing method
a semiconductor device and manufacturing method technology, applied in the field of semiconductor devices, can solve the problems of deteriorating junction withstand voltage between the semiconductor substrate and the resurf layer, and deteriorating withstand voltage of the semiconductor device in the termination region, so as to improve the performance of the semiconductor device and improve the withstand voltage of the semiconductor devi
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first embodiment
[0044]A semiconductor device of this embodiment will be described using FIGS. 1 and 2. FIG. 1 is a plan view and a cross-sectional view about the semiconductor device of this embodiment. Incidentally, the cross-sectional view of FIG. 1 illustrates a state of forming a gate insulating film GI1 in a method of manufacturing the semiconductor device described below. In the plan view, a device region DR is hatched. FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1.
[0045]As illustrated in FIG. 1, the semiconductor device is formed in the semiconductor substrate SUB which is rectangular (square or oblong rectangular) in a plan view. The semiconductor substrate SUB has a principal surface and a rear surface, and the principal surface and the rear surface each have four sides S. In addition, the semiconductor substrate SUB has four side surfaces S. In a center portion of the principal surface, a device region DR is disposed, and a termination region TR is disposed to continuous...
first modification
[0093]A first modification is a modification of the first embodiment. FIG. 14 is a cross-sectional view illustrating a method of manufacturing the semiconductor device according to the first modification.
[0094]A step of removing the oxidation-resistant insulating film ZM1R is performed as illustrated in FIG. 14 after the step of forming the gate insulating film GI2 described using FIG. 9 in the above-described first embodiment. As illustrated in FIG. 14, a mask film MK5 configured by, for example, a photoresist layer is formed on the gate insulating film GI2. The mask film MK5 covers the device region DR, covers parts of the edge termination region ET and the RESURF layer RS1 in the termination region TR, and exposes the whole area of the oxidation-resistant insulating film ZM1R. In other words, an end portion (the side surface S side) of the mask film MK5 is positioned nearer to the device region DR side than an end portion (the device region DR side) of the oxidation-resistant ins...
second modification
[0097]A second modification is a modification of the first embodiment. FIG. 15 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to the second modification.
[0098]The first modification has described the example of removing the oxidation-resistant insulating film ZM1R after the step of forming the gate insulating film GI2 of the first embodiment. However, the second modification performs a step of removing the oxidation-resistant insulating film ZM1R after a step of forming the gate electrode GE described by using FIG. 10. A mask film MK6 is formed to cover the gate insulating film GI2 and the gate electrode as illustrated in FIG. 15. The mask film MK6 has a pattern equal to the pattern of the mask film MK5. Similarly to the first modification, the gate insulating films GI1 and GI2 and the oxidation-resistant insulating film ZM1R exposed from the mask film MK6 are removed. Next, the mask film MK6 is removed. Even in FIG. 15, the removed...
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Abstract
Description
Claims
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