Semiconductor device and manufacturing method

a semiconductor device and manufacturing method technology, applied in the field of semiconductor devices, can solve the problems of deteriorating junction withstand voltage between the semiconductor substrate and the resurf layer, and deteriorating withstand voltage of the semiconductor device in the termination region, so as to improve the performance of the semiconductor device and improve the withstand voltage of the semiconductor devi

Inactive Publication Date: 2020-01-16
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach improves the semiconductor device's performance by maintaining the junction withstand voltage and overall withstand voltage, preventing the formation of interstitial carbon and ensuring better oxidation resistance during the gate insulating film formation process.

Problems solved by technology

According to the examining of the inventors of this application, it is found that the withstand voltage of the semiconductor device deteriorates due to a step of forming the above gate insulating film.
Along with this, it has been found out that a junction withstand voltage between the semiconductor substrate and the RESURF layer deteriorates, and the withstand voltage of the semiconductor device in the termination region deteriorates.
Therefore, there is a possibility that the same problem as the above will arise.

Method used

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  • Semiconductor device and manufacturing method
  • Semiconductor device and manufacturing method
  • Semiconductor device and manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

first embodiment

[0044]A semiconductor device of this embodiment will be described using FIGS. 1 and 2. FIG. 1 is a plan view and a cross-sectional view about the semiconductor device of this embodiment. Incidentally, the cross-sectional view of FIG. 1 illustrates a state of forming a gate insulating film GI1 in a method of manufacturing the semiconductor device described below. In the plan view, a device region DR is hatched. FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1.

[0045]As illustrated in FIG. 1, the semiconductor device is formed in the semiconductor substrate SUB which is rectangular (square or oblong rectangular) in a plan view. The semiconductor substrate SUB has a principal surface and a rear surface, and the principal surface and the rear surface each have four sides S. In addition, the semiconductor substrate SUB has four side surfaces S. In a center portion of the principal surface, a device region DR is disposed, and a termination region TR is disposed to continuous...

first modification

[0093]A first modification is a modification of the first embodiment. FIG. 14 is a cross-sectional view illustrating a method of manufacturing the semiconductor device according to the first modification.

[0094]A step of removing the oxidation-resistant insulating film ZM1R is performed as illustrated in FIG. 14 after the step of forming the gate insulating film GI2 described using FIG. 9 in the above-described first embodiment. As illustrated in FIG. 14, a mask film MK5 configured by, for example, a photoresist layer is formed on the gate insulating film GI2. The mask film MK5 covers the device region DR, covers parts of the edge termination region ET and the RESURF layer RS1 in the termination region TR, and exposes the whole area of the oxidation-resistant insulating film ZM1R. In other words, an end portion (the side surface S side) of the mask film MK5 is positioned nearer to the device region DR side than an end portion (the device region DR side) of the oxidation-resistant ins...

second modification

[0097]A second modification is a modification of the first embodiment. FIG. 15 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to the second modification.

[0098]The first modification has described the example of removing the oxidation-resistant insulating film ZM1R after the step of forming the gate insulating film GI2 of the first embodiment. However, the second modification performs a step of removing the oxidation-resistant insulating film ZM1R after a step of forming the gate electrode GE described by using FIG. 10. A mask film MK6 is formed to cover the gate insulating film GI2 and the gate electrode as illustrated in FIG. 15. The mask film MK6 has a pattern equal to the pattern of the mask film MK5. Similarly to the first modification, the gate insulating films GI1 and GI2 and the oxidation-resistant insulating film ZM1R exposed from the mask film MK6 are removed. Next, the mask film MK6 is removed. Even in FIG. 15, the removed...

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Abstract

A semiconductor device includes: a first conductivity type semiconductor substrate made of silicon carbide; a second conductivity type body region in a device region of the semiconductor substrate; a first conductivity type source region formed in the body region; and a gate electrode formed on the body region through gate insulating films. The semiconductor device further includes, in a termination region of the semiconductor substrate, second conductivity type RESURF layers, and an edge termination region formed in the RESURF layers. Then, the RESURF layers and a front surface of the semiconductor substrate adjacent to the RESURF layers are covered by an oxidation-resistant insulating film.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]The present application claims priority from Japanese Patent Application No. 2016-239283 filed on Dec. 9, 2016, the content of which is hereby incorporated by reference into this application.TECHNICAL FIELD OF THE INVENTION[0002]The present invention relates to a semiconductor device, and particularly to a technology effectively applied to a semiconductor device equipped with a silicon carbide substrate and a method of manufacturing the semiconductor device.BACKGROUND OF THE INVENTION[0003]A low ON-state resistance and a low switching loss are requested for a semiconductor power element besides a high withstand voltage. However, a currently prevailing primary silicon (Si) power element reaches logical performance limitations. Silicon carbide (SiC) has a dielectric breakdown electric field strength about one digit greater than Si. Therefore, element resistance can be reduced logically three digits or more by making a drift layer thin about ...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L29/66H01L23/29H01L21/02H01L21/04H01L29/78H01L23/31H01L29/16H01L29/06
CPCH01L29/66068H01L23/291H01L21/02255H01L23/3171H01L29/0634H01L29/7811H01L29/7395H01L21/049H01L29/1608H01L21/02236H01L21/02271H01L21/045H01L29/7827H01L29/511H01L29/518H01L29/0615H01L29/0619H01L29/063H01L29/0692H01L29/0696
InventorHISADA, KENICHIARAI, KOICHI
OwnerRENESAS ELECTRONICS CORP