System and method for accelerated information handling system memory testing

Abstract

Memory testing at system startup, such as boot POST, of an information handling system is accelerated by adjusting memory testing routines to use instructions that take advantage of optimizations made to information handling system and CPU architectures. For instance, memory test iterations in one Mbyte portions using 128-bit SIMD registers, 64-bit MMX registers, ADD and SUB instructions, the MOVNTDQ instruction, and relying on an initial setting of the gate A20 and protected mode result in a substantially accelerated memory test.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates in general to the field of information handling system memory test, and more particularly to a system and method for accelerated testing of information handling system memory.[0003]2. Description of the Related Art[0004]As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and / or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is pr...

AI Technical Summary

Benefits of technology

[0008]Therefore a need has arisen for a system and method which accelerates memory testing of an information handling system.

[0009]In accordance with the present invention, a system and method are provided which substantially reduce the disadvantages and problems associated with previous methods and systems for performing information handling system memory testing. Memory testing at system startup is accelerated by applying information handling system and central processing unit architecture and instruction improvements to more efficiently and rapidly execute the testing.

[0010]More specifically, a memory test module includes instructions to perform memory testing at startup of an information handling system with updated parameters. For instance, 32-bit code executes with ADD and SUB instructions on a CPU optimized for 32-bit code execution to generate and apply test data with the support of graphics-related architecture, such as the 128-bit SIMD (single instruction multiple data) extension and MMX registers within the CPU for temporary storage. The memory testing executes continuously in protected mode. A walking 1s and 0s routine and a multi-pattern routine are performed using a granularity that equals the block size of the memory banks, such as 1 Mbyte or greater iterations. Gate A20 is initialized once before applying test data and maintained throughout the memory test. The MOVNTDQ instruction is used to move the test data around in memory in a manner that bypasses the cache and thus avoids the need for repeated cache flushes. In this manner, the code is streamlined, the processing is minimized and the overhead of cache, gate A20 and protected mode manipulations are reduced or eliminated.

[0011]The present invention provides a number of important technical advantages. One example of an important technical advantage is that memory testing of an information handling system is accelerated without compromising the integrity of the testing performed. For instance, the 4 Gbyte example above applying the system and method herein completed the memory test in one minute and twenty seconds, 9 times faster than obtained by conventional systems and methods. Speedy execution of memory tests that are required in deployed information handling systems helps to improve the user experience by reducing frustrations and productivity losses related to excessive system startup wait times. Memory testing acceleration is supported through relatively inexpensive modifications to conventional testing performed by the system BIOS or firmware and therefore minimizes the impact on information handling system design and manufacture considerations.

Problems solved by technology

Further, RAM of all types has decreased in cost over time leading information handling system manufacturers and application designers to plan on the availability of increased amounts of RAM as designs progress.

One difficulty that has arisen with the increased memory available on information handling systems is that the system startup time, such as the BIOS POST time, has grown along with memory size due the greater amount of time needed to perform the memory test.

Excessive startup times have an adverse impact on users of information handling systems who often are frustrated by the delay imposed before the information handling system is operational.

Businesses lose substantial worker productivity when workers wait idly for system startup to complete.

However, incomplete memory tests that fail to identify memory failures can lead to even greater frustration and productivity loss when a user's data is inexplicably corrupted.

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