Memory cell

Abstract

A memory cell is provided, in which a resistance value is appropriately controlled, thereby a variable resistance element may be applied with a voltage necessary for changing the element into a high or low resistance state. A storage element 10, a nonlinear resistance element 20, and an MOS transistor 30 are electrically connected in series. The storage element 10 has a nonlinear current-voltage characteristic opposite to a nonlinear current-voltage characteristic of the MOS transistor 30, and changes into a high or low resistance state in accordance with a polarity of applied voltage. The nonlinear resistance element 20 has a nonlinear current-voltage characteristic similar to the nonlinear current-voltage characteristic of the storage element 10.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]The present application is a national stage of International Application No. PCT / JP2008 / 071531 filed on Nov. 27, 2008 and claims priority to Japanese Patent Application No. 2007-308916 filed on Nov. 29, 2007 the disclosures of which are incorporated herein by reference.BACKGROUND[0002]The present invention relates to a memory cell having a variable resistance element.[0003]An NOR or an NAND flash memory has been typically used as a semiconductor nonvolatile memory for data storage. However, such a flash memory needs a high voltage for writing and erasing, and besides, is limited in number of electrons to be injected into a floating gate. Consequently, limitation in size reduction of the flash memory is pointed out.[0004]At present, a resistance change memory such as PRAM (Phase Change Random Access Memory) or PMC (Programmable Metallization Cell) is proposed as a next-generation nonvolatile memory that may exceed a limit in size reduction...

AI Technical Summary

Benefits of technology

[0027]According to the second memory cell of the invention, the nonlinear resistance element having the nonlinear current-voltage characteristic opposite to the nonlinear current-voltage characteristic of the MOS transistor, and having the lower resistance value than the resistance value of the storage element is electrically connected in parallel with the storage element, and electrically connected in series with the MOS transistor. Therefore, in a high-resistance state of the storage element, the resistance value of the nonlinear resistance element connected in parallel with the storage element is dominant for a resistance value of the second memory cell as a whole compared with the resistance value of the storage element. Thus, stable erasing resistance independent of a repetition rate may be achieved.

[0029]According to the fourth memory cell of the invention, the interlayer separation film having the nonlinear current-voltage characteristic opposite to the nonlinear current-voltage characteristic of the MOS transistor, and having the lower resistance value than the resistance value of the resistance change layer is electrically connected in parallel with the resistance change layer, and electrically connected in series with the MOS transistor. Therefore, in a high-resistance state of the resistance change layer, the resistance value of the interlayer separation film connected in parallel with the resistance change layer is dominant for a resistance value of the fourth memory cell as a whole compared with the resistance value of the resistance change layer. Thus, stable erasing resistance independent of a repetition rate may be achieved.

[0030]According to the fifth memory cell of the invention, the voltage control film having the nonlinear current-voltage characteristic opposite to the nonlinear current-voltage characteristic of the MOS transistor, and having the lower resistance value than the resistance value of the resistance change layer is, in the opening, electrically connected in series with the region of the resistance change layer opposed to the opening, and the region of the voltage control film and the region of the interlayer separation film, each region being corresponding to the periphery of the opening, are electrically connected in parallel with the region of the resistance change layer and the region of the voltage control film, each region being opposed to the opening. Therefore, a voltage applied to the fifth memory cell may be controlled to have a value within a range where current is not significantly limited by the MOS transistor. Thus, the storage element may be applied with a voltage necessary for changing the element into a high or low resistance state. In a high-resistance state of the resistance change layer, the resistance value of the region of the voltage control film and the region of the interlayer separation film connected in parallel with the regions of the films opposed to the opening is dominant for a resistance value of the fifth memory cell as a whole compared with the resistance value of the region of the resistance change layer and the region of the voltage control film, each region being opposed to the opening. Thus, stable erasing resistance independent of a repetition rate may be achieved.

Problems solved by technology

However, a current-voltage characteristic of a variable resistance element is not ohmic, and is nonlinear in such a manner that current is proportional to voltage raised to a power being larger than one.

This has caused a problem that when a voltage applied to the resistance change memory is increased, the resistance change element is not easily applied with a voltage necessary for changing the element into a high or low resistance state due to current limitation of the transistor.

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