Parallel communication method

A technology of full signal and confirmation signal, which is applied in the field of parallel data transmission using 8255 interface, and can solve problems such as inability to complete parallel communication

Inactive Publication Date: 2007-11-21
SHANGHAI MITSUBISHI ELEVATOR CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The disadvantage of this parallel data transmission method is that when the device side is not equipped with an 8255 interface, but only has a general-purpose input and output interface, the above-mentioned parallel communication cannot be completed.

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Embodiment Construction

[0016] As shown in Figure 3, the host side has an 8255 interface, which has three ports A, B, and C, and the device side has a general-purpose input and output interface, which has three ports: the first port, the second port, and the third port , the first port, the second port and the third port are respectively port 1, port 2 and port 3 in Fig. 3, port A and port B both work in mode 1, and when the interrupt is allowed, the host side port A is an input port, port B is an output port, port 1 on the device side is an output port, port 3 is an input port, and port C and port 2 provide handshake signals.

[0017] The data exchange flow chart of the method of the present invention is shown in FIG. 4 . First, the host side sends data through port B. At this time, the output buffer full signal OBF is valid, and the host queries the confirmation signal ACK to confirm whether the device side receives the data and responds. The device side inquires that the output buffer full signal ...

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Abstract

This invention relates to a parallel communication method, which can realize the parallel communication with the host matched with 8255 interface even though it is only matched with a general input / output interface at the device end, characterizing that after the device end receives data sent by the host and follows up the respond data, it sends a confirmed signal and makes the confirmed signal invalid after a period of time.

Description

technical field [0001] The invention relates to a parallel communication method, in particular to a method for parallel data transmission using an 8255 interface. Background technique [0002] The input and output interface is an integral part of the microcomputer, through which data transmission with external devices is realized. At present, when using a microcomputer (hereinafter referred to as "host") to perform parallel data transmission with the device controller, the communication method shown in Figure 1 is generally adopted. Both the host and the device use an 8255 (improved 8255A) interface. Figure 2 is the flow of data exchange for it. [0003] The programmable peripheral interface circuit 8255 is a programmable parallel input and output interface circuit with 24 input and output pins. The 8255 has three independent input and output ports: Port A, Port B, and Port C. The ports A, B, and C can be used in combination to form a parallel interface for single-wire, d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/00
Inventor 乔进友
Owner SHANGHAI MITSUBISHI ELEVATOR CO LTD
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