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Mask pattern of semiconductor device and method for forming the same

A mask pattern and semiconductor technology, which can be used in the manufacture of semiconductor/solid-state devices, photoengraving process of patterned surface, instruments, etc.

Inactive Publication Date: 2010-02-03
DONGBU HITEK CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Although various methods have been adopted, the resolution problem of fine line width is still not easy to solve

Method used

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  • Mask pattern of semiconductor device and method for forming the same
  • Mask pattern of semiconductor device and method for forming the same
  • Mask pattern of semiconductor device and method for forming the same

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Experimental program
Comparison scheme
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Embodiment Construction

[0016] Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0017] Before introducing the embodiments, the principle of the pattern collapse phenomenon is firstly introduced.

[0018] figure 1 is a schematic diagram showing the development process of a photoresist layer, figure 2 is a picture showing the pattern collapse phenomenon of the photoresist layer.

[0019] refer to figure 1 , the developer (not shown) is sprayed on the semiconductor substrate 100 through the nozzle 40 of the developing unit (not shown), and then the photoresist layer is developed to obtain the photoresist layer pattern of the semiconductor substrate 100 ( not shown).

[0020] Thereafter, the photoresist layer pattern of the semiconductor substrate 100 is cleaned by spraying deionized water 50 through the nozzle 40 .

[0021] After the cleaned semiconductor substrate 100 is dried, a scanning electron microscope (SEM) is used to obs...

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Abstract

The invention provides a mask pattern of a semiconductor device and a method for forming the same comprising a number of adjacent main pattern; and an auxilliary pattern above at least one of the tipand middle part of each main pattern, wherein the linewidth of auxilliary pattern is wider the the linewidth of main pattern and the auxilliary pattern is interlaced. The said invention can prevent the mask pattern with fine linewidth from collapsing.

Description

technical field [0001] The present invention relates to a mask pattern of a semiconductor device and a manufacturing method thereof. Background technique [0002] A manufacturing technique of a mask pattern greatly affects a pattern formed on a semiconductor substrate. [0003] In particular, without proper consideration of the optical proximity effect of the mask pattern, the linewidth of the pattern is distorted in the photolithography process, resulting in a linear shortening of the critical dimension. [0004] In addition, as the semiconductor device is scaled down, in the photolithography process, the pattern is destroyed by the optical proximity effect of adjacent patterns. [0005] Therefore, various methods to minimize the light distortion phenomenon, such as optical proximity correction (OPC) and phase shift mask technology, are used. OPC technology uses patterns to compensate for the problem of light diffraction, while phase-transform mask technology increases op...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G03F1/14G03F1/00H01L21/027
CPCG03F1/36G03F1/144G03F1/38
Inventor 李峻硕
Owner DONGBU HITEK CO LTD
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