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Frequency divider, frequency dividing device and method

一种分频器、混频器的技术,应用在脉冲计数器、同步脉冲计数器、计数链脉冲计数器等方向,能够解决昂贵、不对称的耦合衰减、低效设计等问题

Active Publication Date: 2012-06-13
SKYWORKS SOLUTIONS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Also, the divider should be well shielded because there are signals with a 45° phase offset in this divider, and asymmetric coupling between these signals can cause attenuation
Also, the divider should dissipate low power especially when the circuit operates at gigahertz frequencies
[0007] However, these different criteria lead to expensive and inefficient designs, especially in terms of power consumption

Method used

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  • Frequency divider, frequency dividing device and method
  • Frequency divider, frequency dividing device and method
  • Frequency divider, frequency dividing device and method

Examples

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Embodiment Construction

[0016] refer to figure 1 , shows a partial block diagram of the system according to an embodiment of the present invention. Such as figure 1 described, more precisely shows the local oscillator and mixer portion of a system. The phrase "lomix" (local oscillator mixer) as used herein refers to a local oscillator and a mixer. Such as figure 1 As shown, the local oscillator mixer 10 includes a quadrature mixer 20 , a first frequency divider 30 , and a second frequency divider 40 . Such as figure 1 In the embodiment shown, the frequency dividers 30 and 40 may be divided by four frequency dividers, but the scope of the present invention is not limited thereto.

[0017] exist figure 1 The components that provide the clock input to frequency divider 40 are also shown in . These components include a crystal oscillator 50 providing a reference frequency to a phase detector 55 which in turn is coupled to a VCO 60 . Based on the control signal provided by the phase detector 55 an...

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Abstract

In one embodiment, a local oscillator and mixer architecture may include a frequency divider having I and Q channel master storage elements formed of devices of a first size, and I and Q channel slave storage elements formed of devices of a second size, where the second size is smaller than the first size. In such manner, power consumption may be reduced while reducing phase noise in signals provided from the frequency divider to the corresponding mixer.

Description

technical field [0001] This invention relates to circuits used in integrated circuits (ICs), and more particularly to circuits used in generating frequencies for processing quadrature signals. Background technique [0002] Downconversion occurs in many systems including receivers, tuners, radios, cellular telephones, etc., where a signal received at a very high frequency, such as radio frequency (RF), is received and processed to obtain a lower frequency signal for further processing. Such lower frequency signals may include intermediate frequency (IF) signals, such as low IF signals. In other systems, the RF signal may be directly down-converted to a zero-IF signal. [0003] Typically, this is done by taking a received signal at a first frequency (typically RF) and mixing with a local oscillator (LO) frequency to obtain the desired IF or other lower frequency signal This down conversion. In some systems, the LO frequency may be generated using a crystal oscillator or ot...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03L7/00H03K21/00
CPCH03K23/542H03K23/54H03D7/166
Inventor A·拉菲
Owner SKYWORKS SOLUTIONS INC