Method for detecting data loss of field programmable gate array

A technology of data loss and detection method, applied in the field of communication, can solve the problems of complicated functions and systematization, data loss, etc., and achieve the effect of enhancing maintenance methods, saving maintenance costs, and shortening maintenance time.

Inactive Publication Date: 2008-01-23
ZTE CORP
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Problems solved by technology

At the same time, the functions implemented based on FPGA are becoming more and more complex and systematic.
[0003] But at the same time, the programmable nature of FPGA makes it possible to experience phenomena that other ASIC chips do not have during field use. For example, the data inside the FPGA

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  • Method for detecting data loss of field programmable gate array

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Embodiment Construction

[0016] The technical solution of the present invention will be described in more detail below with reference to the drawings and embodiments.

[0017] Figure 1 is a physical connection diagram between the CPU and the FPGA in the communication device. The CPU can access the FPGA through the device software running on it. There is a data line and an address line (Data / Addr) between the CPU and the FPGA, which are used for the CPU to access the logic unit inside the FPGA; at the same time, the PS port of the FPGA is also connected to the I / O port of the CPU, and the FPGA reads from the CPU through the PS port. Reload the FPGA data.

[0018] The method for detecting whether data loss of FPGA comprises the following steps:

[0019] Step 1, select a logic unit in the FPGA, and write a set value in one of the registers;

[0020] Step 2, the CPU reads the value of the above register, if the value is still the set value, execute step 3; otherwise, the FPGA reloads the FPGA data from ...

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Abstract

The invention provides a way for detecting data loss in a field programmable gate array FPGA, which comprises the following procedures: a. a logic unit in the FGPA is selected, and a set value is written in the logic unit; b. CPU reads the value of the logic unit, if the value is the set value, procedure c is executed; otherwise, the process for abnormality applies; c. procedure b is executed after certain time. The invention allows periodical monitoring of data loss in FPGA. When any data loss is found in FPGA, the lost data can be recovered by the process for abnormality in the software. The invention enhances the maintenance means for communication devices, shortens eh maintenance time and saves maintenance cost.

Description

technical field [0001] The invention relates to the communication field, in particular to a method for detecting data loss of a Field Programmable Gate Array device FPGA. Background technique [0002] The programmable feature of FPGA brings great flexibility to digital circuit design, and also greatly reduces the development cycle and cost. For this reason, in various fields involved in digital circuits, including the communication field, FPGA has played an increasingly important role and has also been applied on a large scale. At the same time, the functions realized based on FPGA are becoming more and more complex and systematic. [0003] But at the same time, the programmable nature of FPGA makes it possible to experience phenomena that other ASIC chips do not have during field use. For example, data inside the FPGA may be lost due to some reasons, but the chip itself is not damaged. Detecting whether the data contained in the FPGA is normal in the communication equipme...

Claims

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Application Information

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IPC IPC(8): G01R31/317G01R31/3177
Inventor 李吉红
Owner ZTE CORP
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