Method for detecting data loss of field programmable gate array

Abstract

The invention provides a way for detecting data loss in a field programmable gate array FPGA, which comprises the following procedures: a. a logic unit in the FGPA is selected, and a set value is written in the logic unit; b. CPU reads the value of the logic unit, if the value is the set value, procedure c is executed; otherwise, the process for abnormality applies; c. procedure b is executed after certain time. The invention allows periodical monitoring of data loss in FPGA. When any data loss is found in FPGA, the lost data can be recovered by the process for abnormality in the software. The invention enhances the maintenance means for communication devices, shortens eh maintenance time and saves maintenance cost.

Description

technical field

[0001] The invention relates to the communication field, in particular to a method for detecting data loss of a Field Programmable Gate Array device FPGA. Background technique

[0002] The programmable feature of FPGA brings great flexibility to digital circuit design, and also greatly reduces the development cycle and cost. For this reason, in various fields involved in digital circuits, including the communication field, FPGA has played an increasingly important role and has also been applied on a large scale. At the same time, the functions realized based on FPGA are becoming more and more complex and systematic.

[0003] But at the same time, the programmable nature of FPGA makes it possible to experience phenomena that other ASIC chips do not have during field use. For example, data inside the FPGA may be lost due to some reasons, but the chip itself is not damaged. Detecting whether the data contained in the FPGA is normal in the communication equipme...

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